zephyr/arch/xtensa
Daniel Leung fa25c0b0b8 xtensa: mmu: invalidate mem domain TLBs during page table swap
This adds a kconfig to enable invalidating the TLBs related to
the incoming thread's memory domain during page table swaps.
It provides a workaround, if needed, to clear out stale TLB
entries used by the thread being swapped out. Those stale
entries may contain incorrect permissions and rings.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-12-27 15:59:05 +00:00
..
core xtensa: mmu: invalidate mem domain TLBs during page table swap 2023-12-27 15:59:05 +00:00
include xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
CMakeLists.txt xtensa: userspace: Warning about impl security 2023-11-21 15:49:48 +01:00
Kconfig xtensa: mmu: invalidate mem domain TLBs during page table swap 2023-12-27 15:59:05 +00:00