Daniel Leung fa25c0b0b8 xtensa: mmu: invalidate mem domain TLBs during page table swap ... This adds a kconfig to enable invalidating the TLBs related to the incoming thread's memory domain during page table swaps. It provides a workaround, if needed, to clear out stale TLB entries used by the thread being swapped out. Those stale entries may contain incorrect permissions and rings. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2023-12-27 15:59:05 +00:00
..
arc	style: fix misspelling in "precededs"	2023-12-20 11:55:46 +00:00
arm	arm: debug: Add GDB stub for aarch32	2023-12-18 09:31:42 +01:00
arm64	arch: make CONFIG_EXCEPTION_DEBUG cross arch config	2023-12-14 09:32:27 +01:00
common	arch: common: multilevel irq: verify interrupt level bits configuration	2023-12-08 08:40:41 -05:00
mips	arch: mips: use LOG_ERR to print exceptions	2023-12-14 09:32:27 +01:00
nios2	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
posix	native_simulator: Allow to pass extra options for localizing symbols	2023-12-06 09:25:41 +00:00
riscv	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
sparc	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
x86	arch: make CONFIG_EXCEPTION_DEBUG cross arch config	2023-12-14 09:32:27 +01:00
xtensa	xtensa: mmu: invalidate mem domain TLBs during page table swap	2023-12-27 15:59:05 +00:00
CMakeLists.txt	…
Kconfig	arch: make CONFIG_EXCEPTION_DEBUG cross arch config	2023-12-14 09:32:27 +01:00