zephyr/soc
Pierre-Louis Bossart b871138fae soc/intel_adsp: fix typo in L1EXP definition
The field offset is incorrect, L1EXP is at bit 24 and L1ETP at bit 25.

Fixes: cc6e9c094a ("soc/intel_adsp: Low level HDA driver and tests")
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2023-06-06 17:20:01 -04:00
..
arc drivers: pinctrl: add pinctrl driver for ARC emsdp 2023-05-29 09:21:07 -04:00
arm nordic: Rely on internal busy_wait implementation for QEMU 2023-06-05 20:20:54 -04:00
arm64 barriers: Move __ISB() to the new API 2023-05-24 13:13:57 -04:00
mips
nios2
posix soc_inf: Refactor native tasks into own header 2023-04-13 13:35:20 +02:00
riscv soc: riscv: gd32vf103: Fix SYS_CLOCK_HW_CYCLES_PER_SEC to 27000000 2023-06-05 07:08:02 -04:00
sparc
x86
xtensa soc/intel_adsp: fix typo in L1EXP definition 2023-06-06 17:20:01 -04:00
Kconfig