zephyr

History

Ramakrishna Pallala 151f431efa arch: nios2: update nios2 softcpu image Update nios2 softcpu image which supports additional soft IP's like I2C, SPI, SGDMA, QSPI, SysID, etc... Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>		2017-12-12 08:25:58 -05:00
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README	…
ghrd_10m50da.qpf	…
ghrd_10m50da.qsf	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00
ghrd_10m50da.qsys	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00
ghrd_10m50da.sof	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00
ghrd_10m50da.sopcinfo	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00
ghrd_10m50da_top.v	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00
ghrd_timing.sdc	arch: nios2: update nios2 softcpu image	2017-12-12 08:25:58 -05:00

README

These files are a Nios II/F CPU design provided by Altera for evaluating
Zephyr on Nios II. This design is intended for the Altera MAX10 10M50 Rec C
development board. You can find more information about this board here:

https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-10-fpga-development-kit.html

You will need the Quartus SDK in order to modify this CPU or flash it onto
a supported device. The Lite version of Quartus may be obtained without charge
from the following link:

http://dl.altera.com/?edition=lite

To flash this CPU, use the nios2-configure-sof tool:

$ nios2-configure-sof ghrd_10m50da.sof

The 'make flash' target will also package up the kernel and CPU into a single
.pof file which will then put the image onto the device using quartus_pgm tool.