254 lines
5.8 KiB
Plaintext
254 lines
5.8 KiB
Plaintext
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/l4/stm32l4.dtsi>
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/ {
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soc {
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pinctrl: pin-controller@48000000 {
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gpiod: gpio@48000c00 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48000c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;
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label = "GPIOD";
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};
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gpioe: gpio@48001000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
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label = "GPIOE";
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};
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gpiof: gpio@48001400 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>;
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label = "GPIOF";
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};
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gpiog: gpio@48001800 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>;
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label = "GPIOG";
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};
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
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interrupts = <39 0>;
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status = "disabled";
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label = "UART_3";
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};
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uart4: serial@40004c00 {
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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interrupts = <52 0>;
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status = "disabled";
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label = "UART_4";
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};
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uart5: serial@40005000 {
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
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interrupts = <53 0>;
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status = "disabled";
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label = "UART_5";
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label= "I2C_2";
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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label = "SPI_2";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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label = "SPI_3";
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};
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timers3: timers@40000400 {
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compatible = "st,stm32-timers";
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reg = <0x40000400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
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interrupts = <29 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_3";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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label = "PWM_3";
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#pwm-cells = <3>;
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};
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};
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timers4: timers@40000800 {
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compatible = "st,stm32-timers";
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reg = <0x40000800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>;
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interrupts = <30 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_4";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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label = "PWM_4";
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#pwm-cells = <3>;
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};
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};
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timers5: timers@40000c00 {
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compatible = "st,stm32-timers";
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reg = <0x40000c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
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interrupts = <50 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_5";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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label = "PWM_5";
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#pwm-cells = <3>;
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};
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};
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timers7: timers@40001400 {
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compatible = "st,stm32-timers";
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reg = <0x40001400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
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interrupts = <55 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_7";
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};
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timers8: timers@40013400 {
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compatible = "st,stm32-timers";
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reg = <0x40013400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
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interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
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interrupt-names = "brk", "up", "trgcom", "cc";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_8";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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label = "PWM_8";
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#pwm-cells = <3>;
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};
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};
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timers17: timers@40014800 {
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compatible = "st,stm32-timers";
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reg = <0x40014800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>;
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interrupts = <26 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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label = "TIMERS_17";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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label = "PWM_17";
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#pwm-cells = <3>;
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};
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};
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can1: can@40006400 {
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compatible = "st,stm32-can";
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reg = <0x40006400 0x400>;
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interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
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interrupt-names = "TX", "RX0", "RX1", "SCE";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN
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status = "disabled";
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label = "CAN_1";
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sjw = <1>;
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sample-point = <875>;
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};
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sdmmc1: sdmmc@40012800 {
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compatible = "st,stm32-sdmmc";
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reg = <0x40012800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>;
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interrupts = <49 0>;
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status = "disabled";
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label = "SDMMC_1";
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};
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dac1: dac@40007400 {
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compatible = "st,stm32-dac";
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reg = <0x40007400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
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status = "disabled";
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label = "DAC_1";
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#io-channel-cells = <1>;
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};
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adc3: adc@50040200 {
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compatible = "st,stm32-adc";
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reg = <0x50040200 0x100>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00002000>;
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interrupts = <47 0>;
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status = "disabled";
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label = "ADC_3";
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#io-channel-cells = <1>;
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};
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};
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};
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