Francois Ramu 2e0e82e107 dts: arm: stm32l0 LSI clock freq is 37kHz ... Corrects the LSI clock freq for stm32l0x mcus especially stm32l0x1 stm32l0x2 stm32l0x3 series Signed-off-by: Francois Ramu <francois.ramu@st.com>		2022-03-01 11:51:54 +01:00
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f0	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
f1	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
f2	linker: Introduce zephyr,memory-region compatible	2022-02-21 22:02:04 -05:00
f3	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
f4	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
f7	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
g0	…
g4	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
h7	dts: arm: st: add stm32h725 dts support	2022-02-28 09:15:33 -06:00
l0	dts: arm: stm32l0 LSI clock freq is 37kHz	2022-03-01 11:51:54 +01:00
l1	…
l4	drivers: can: unify CAN controller configuration in devicetree	2022-02-24 13:48:55 -08:00
l5	sensors: STM32: Add support for L5 die temp sensor	2022-01-13 10:34:10 +01:00
mp1	dts/arm/st: mp1: Default node status should be "disabled"	2021-11-26 11:36:42 +01:00
u5	dts: arm: st: stm32: add health configuration support	2021-12-21 17:09:02 +01:00
wb	linker: Introduce zephyr,memory-region compatible	2022-02-21 22:02:04 -05:00
wl	dts: arm: st: stm32: add health configuration support	2021-12-21 17:09:02 +01:00