182 lines
5.0 KiB
Plaintext
182 lines
5.0 KiB
Plaintext
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_ESP32S3
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select XTENSA
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select DYNAMIC_INTERRUPTS
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select ARCH_SUPPORTS_COREDUMP
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select CLOCK_CONTROL
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select PINCTRL
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select HAS_ESPRESSIF_HAL
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select CPU_HAS_FPU
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select HAS_PM
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select HAS_POWEROFF
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if SOC_SERIES_ESP32S3
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config ESP32S3_APPCPU_IRAM
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hex "ESP32S3 APPCPU IRAM size"
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depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
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default 0x20000
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help
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Defines APPCPU IRAM area in bytes.
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config ESP32S3_APPCPU_DRAM
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hex "ESP32S3 APPCPU DRAM size"
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depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
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default 0x10000
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help
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Defines APPCPU DRAM area in bytes.
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config SOC_ENABLE_APPCPU
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bool
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default y
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depends on IPM && SOC_ESP32S3_PROCPU
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depends on MBOX && SOC_ESP32S3_PROCPU
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help
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This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
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menu "Cache config"
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choice ESP32S3_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S3_INSTRUCTION_CACHE_16KB
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help
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Instruction cache size to be set on application startup.
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If you use 16KB instruction cache rather than 32KB instruction cache,
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then the other 16KB will be managed by heap allocator.
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config ESP32S3_INSTRUCTION_CACHE_16KB
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bool "16KB"
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config ESP32S3_INSTRUCTION_CACHE_32KB
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bool "32KB"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
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default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
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choice ESP32S3_ICACHE_ASSOCIATED_WAYS
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prompt "Instruction cache associated ways"
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default ESP32S3_INSTRUCTION_CACHE_8WAYS
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help
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Instruction cache associated ways to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_INSTRUCTION_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_ICACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
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default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
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choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S3_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_INSTRUCTION_CACHE_16KB
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config ESP32S3_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
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config ESP32S3_INSTRUCTION_CACHE_WRAP
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bool "Define instruction cache wrap mode"
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help
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If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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choice ESP32S3_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S3_DATA_CACHE_32KB
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help
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Data cache size to be set on application startup.
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If you use 32KB data cache rather than 64KB data cache,
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the other 32KB will be added to the heap.
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config ESP32S3_DATA_CACHE_16KB
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bool "16KB"
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config ESP32S3_DATA_CACHE_32KB
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bool "32KB"
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config ESP32S3_DATA_CACHE_64KB
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bool "64KB"
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endchoice
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config ESP32S3_DATA_CACHE_SIZE
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hex
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# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
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default 0x8000 if ESP32S3_DATA_CACHE_16KB
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default 0x8000 if ESP32S3_DATA_CACHE_32KB
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default 0x10000 if ESP32S3_DATA_CACHE_64KB
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choice ESP32S3_DCACHE_ASSOCIATED_WAYS
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prompt "Data cache associated ways"
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default ESP32S3_DATA_CACHE_8WAYS
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help
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Data cache associated ways to be set on application startup.
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config ESP32S3_DATA_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_DATA_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_DCACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_DATA_CACHE_4WAYS
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default 8 if ESP32S3_DATA_CACHE_8WAYS
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choice ESP32S3_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S3_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S3_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
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config ESP32S3_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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config ESP32S3_DATA_CACHE_LINE_64B
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bool "64 Bytes"
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endchoice
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config ESP32S3_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_DATA_CACHE_LINE_16B
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default 32 if ESP32S3_DATA_CACHE_LINE_32B
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default 64 if ESP32S3_DATA_CACHE_LINE_64B
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config ESP32S3_DATA_CACHE_WRAP
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bool "Define data cache wrap mode"
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help
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If enabled, data cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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config MAC_BB_PD
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bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
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depends on SOC_SERIES_ESP32S3 && TICKLESS_KERNEL
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default n
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help
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If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
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down when PHY is disabled. Enabling this setting reduces power consumption
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by a small amount but increases RAM use by approximat
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endmenu # Cache config
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endif # SOC_SERIES_ESP32S3
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