# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_ESP32S3
	select XTENSA
	select DYNAMIC_INTERRUPTS
	select ARCH_SUPPORTS_COREDUMP
	select CLOCK_CONTROL
	select PINCTRL
	select HAS_ESPRESSIF_HAL
	select CPU_HAS_FPU
	select HAS_PM
	select HAS_POWEROFF

if SOC_SERIES_ESP32S3

config ESP32S3_APPCPU_IRAM
	hex "ESP32S3 APPCPU IRAM size"
	depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
	default 0x20000
	help
	  Defines APPCPU IRAM area in bytes.

config ESP32S3_APPCPU_DRAM
	hex "ESP32S3 APPCPU DRAM size"
	depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
	default 0x10000
	help
	  Defines APPCPU DRAM area in bytes.

config SOC_ENABLE_APPCPU
	bool
	default y
	depends on IPM && SOC_ESP32S3_PROCPU
	depends on MBOX && SOC_ESP32S3_PROCPU
	help
	  This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.

menu "Cache config"

choice ESP32S3_INSTRUCTION_CACHE_SIZE
	prompt "Instruction cache size"
	default ESP32S3_INSTRUCTION_CACHE_16KB
	help
	  Instruction cache size to be set on application startup.
	  If you use 16KB instruction cache rather than 32KB instruction cache,
	  then the other 16KB will be managed by heap allocator.

	config ESP32S3_INSTRUCTION_CACHE_16KB
		bool "16KB"
	config ESP32S3_INSTRUCTION_CACHE_32KB
		bool "32KB"
endchoice

config ESP32S3_INSTRUCTION_CACHE_SIZE
	hex
	default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
	default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB

choice ESP32S3_ICACHE_ASSOCIATED_WAYS
	prompt "Instruction cache associated ways"
	default ESP32S3_INSTRUCTION_CACHE_8WAYS
	help
	  Instruction cache associated ways to be set on application startup.

	config ESP32S3_INSTRUCTION_CACHE_4WAYS
		bool "4 ways"
	config ESP32S3_INSTRUCTION_CACHE_8WAYS
		bool "8 ways"
endchoice

config ESP32S3_ICACHE_ASSOCIATED_WAYS
	int
	default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
	default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS

choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
	prompt "Instruction cache line size"
	default ESP32S3_INSTRUCTION_CACHE_LINE_32B
	help
	  Instruction cache line size to be set on application startup.

	config ESP32S3_INSTRUCTION_CACHE_LINE_16B
		bool "16 Bytes"
		depends on ESP32S3_INSTRUCTION_CACHE_16KB
	config ESP32S3_INSTRUCTION_CACHE_LINE_32B
		bool "32 Bytes"
endchoice

config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
	int
	default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
	default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B

config ESP32S3_INSTRUCTION_CACHE_WRAP
	bool "Define instruction cache wrap mode"
	help
	  If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
	  The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
	  However, it depends on complex conditions.

choice ESP32S3_DATA_CACHE_SIZE
	prompt "Data cache size"
	default ESP32S3_DATA_CACHE_32KB
	help
	  Data cache size to be set on application startup.
	  If you use 32KB data cache rather than 64KB data cache,
	  the other 32KB will be added to the heap.

	config ESP32S3_DATA_CACHE_16KB
		bool "16KB"
	config ESP32S3_DATA_CACHE_32KB
		bool "32KB"
	config ESP32S3_DATA_CACHE_64KB
		bool "64KB"
endchoice

config ESP32S3_DATA_CACHE_SIZE
	hex
	# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
	default 0x8000 if ESP32S3_DATA_CACHE_16KB
	default 0x8000 if ESP32S3_DATA_CACHE_32KB
	default 0x10000 if ESP32S3_DATA_CACHE_64KB

choice ESP32S3_DCACHE_ASSOCIATED_WAYS
	prompt "Data cache associated ways"
	default ESP32S3_DATA_CACHE_8WAYS
	help
	  Data cache associated ways to be set on application startup.

	config ESP32S3_DATA_CACHE_4WAYS
		bool "4 ways"
	config ESP32S3_DATA_CACHE_8WAYS
		bool "8 ways"
endchoice

config ESP32S3_DCACHE_ASSOCIATED_WAYS
	int
	default 4 if ESP32S3_DATA_CACHE_4WAYS
	default 8 if ESP32S3_DATA_CACHE_8WAYS

choice ESP32S3_DATA_CACHE_LINE_SIZE
	prompt "Data cache line size"
	default ESP32S3_DATA_CACHE_LINE_32B
	help
	  Data cache line size to be set on application startup.

	config ESP32S3_DATA_CACHE_LINE_16B
		bool "16 Bytes"
		depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
	config ESP32S3_DATA_CACHE_LINE_32B
		bool "32 Bytes"
	config ESP32S3_DATA_CACHE_LINE_64B
		bool "64 Bytes"
endchoice

config ESP32S3_DATA_CACHE_LINE_SIZE
	int
	default 16 if ESP32S3_DATA_CACHE_LINE_16B
	default 32 if ESP32S3_DATA_CACHE_LINE_32B
	default 64 if ESP32S3_DATA_CACHE_LINE_64B

config ESP32S3_DATA_CACHE_WRAP
	bool "Define data cache wrap mode"
	help
	  If enabled, data cache will use wrap mode to read spi flash or spi ram.
	  The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
	  However, it depends on complex conditions.

config MAC_BB_PD
	bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
	depends on SOC_SERIES_ESP32S3 && TICKLESS_KERNEL
	default n
	help
	  If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
	  down when PHY is disabled. Enabling this setting reduces power consumption
	  by a small amount but increases RAM use by approximat

endmenu  # Cache config

endif # SOC_SERIES_ESP32S3