Jean-Paul Etienne be856d4b13 riscv32: riscv32-qemu: provide a more generic way of filtering IRQs from exceptions ... Currently, if IRQ number != RISCV_MACHINE_TIMER_IRQ (only device IRQ in qemu), riscv32-qemu was considering the IRQ as an exception. However, fake IRQs can also be generated by setting corresponding bits in the Machine Interrupt Pending register (mip). With the current implementation, these IRQs were considered as unexpected exceptions. To circumvent the problem, update the IRQ filtering mechanism by considering an IRQ (IRQ number as reported by the mcause register) as an exception only if its corresponding bit is NOT set in the mip register. Change-Id: I4c581a84d83ee0ba2c4ea35f89ba732401eb8fa4 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>		2017-02-16 17:33:02 +00:00
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arc	arc: add _tsc_read for 64-bit timestamp	2017-02-15 05:55:09 +00:00
arm	qemu_cortex_m3: fixed network connectivity	2017-02-15 01:36:27 +00:00
common	gen_isr_tables: apply offset to irq parameter	2017-02-15 04:49:19 +00:00
nios2	nios2: use gen_isr_tables mechanism	2017-02-11 01:28:00 +00:00
riscv32	riscv32: riscv32-qemu: provide a more generic way of filtering IRQs from exceptions	2017-02-16 17:33:02 +00:00
x86	quark_se: Save/restore debug registers.	2017-02-11 00:15:08 +00:00
xtensa	xtensa: fix numerous checkpatch issues	2017-02-13 11:39:03 -08:00
Kconfig	gen_isr_tables: make vector offset a hidden option	2017-02-15 04:49:17 +00:00
Makefile	gen_isr_tables: New static interrupt build mechanism	2017-02-11 01:27:58 +00:00