zephyr/soc/riscv/openisa_rv32m1
Carlo Caione 10061efdc4 riscv: Rework and cleanup Kconfig
This patch is doing several things:

- Core ISA and extension Kconfig symbols have now a formalized name
  (CONFIG_RISCV_ISA_* and CONFIG_RISCV_ISA_EXT_*)

- a new Kconfig.isa file was introduced with the full set of extensions
  currently supported by the v2.2 spec

- a new Kconfig.core file was introduced to host all the RISCV cores
  (currently only E31)

- ISA and extensions settings are moved to SoC configuration files

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-06-05 14:28:42 +02:00
..
CMakeLists.txt
Kconfig
Kconfig.defconfig soc: riscv: openisa: rv32m1: remove default pinmux configuration 2022-05-05 13:34:39 -05:00
Kconfig.soc riscv: Rework and cleanup Kconfig 2022-06-05 14:28:42 +02:00
linker.ld linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
pinctrl_soc.h soc: riscv: openisa: rv32m1: add pinctrl header file 2022-05-05 13:34:39 -05:00
soc.c soc: migrate includes to <zephyr/...> 2022-05-06 19:57:59 +02:00
soc.h
soc_context.h
soc_irq.S asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
soc_offsets.h
soc_ri5cy.h
soc_zero_riscy.h
vector.S asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
vector_table.ld
wdog.S asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00