372 lines
8.6 KiB
C
372 lines
8.6 KiB
C
/*
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* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
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*
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* Functions here are designed to produce efficient code to
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* search an Xtensa bitmask of interrupts, inspecting only those bits
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* declared to be associated with a given interrupt level. Each
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* dispatcher will handle exactly one flagged interrupt, in numerical
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* order (low bits first) and will return a mask of that bit that can
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* then be cleared by the calling code. Unrecognized bits for the
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* level will invoke an error handler.
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*/
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#include <xtensa/config/core-isa.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/sw_isr_table.h>
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#if !defined(XCHAL_INT0_LEVEL) || XCHAL_INT0_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT1_LEVEL) || XCHAL_INT1_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT2_LEVEL) || XCHAL_INT2_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT3_LEVEL) || XCHAL_INT3_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT4_LEVEL) || XCHAL_INT4_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT5_LEVEL) || XCHAL_INT5_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT6_LEVEL) || XCHAL_INT6_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT7_LEVEL) || XCHAL_INT7_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT8_LEVEL) || XCHAL_INT8_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT9_LEVEL) || XCHAL_INT9_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT10_LEVEL) || XCHAL_INT10_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT12_LEVEL) || XCHAL_INT12_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT13_LEVEL) || XCHAL_INT13_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT17_LEVEL) || XCHAL_INT17_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT18_LEVEL) || XCHAL_INT18_LEVEL != 1
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT11_LEVEL) || XCHAL_INT11_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT15_LEVEL) || XCHAL_INT15_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT22_LEVEL) || XCHAL_INT22_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT23_LEVEL) || XCHAL_INT23_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT27_LEVEL) || XCHAL_INT27_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT29_LEVEL) || XCHAL_INT29_LEVEL != 3
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT14_LEVEL) || XCHAL_INT14_LEVEL != 7
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT16_LEVEL) || XCHAL_INT16_LEVEL != 5
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT26_LEVEL) || XCHAL_INT26_LEVEL != 5
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT31_LEVEL) || XCHAL_INT31_LEVEL != 5
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT19_LEVEL) || XCHAL_INT19_LEVEL != 2
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT20_LEVEL) || XCHAL_INT20_LEVEL != 2
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT21_LEVEL) || XCHAL_INT21_LEVEL != 2
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT24_LEVEL) || XCHAL_INT24_LEVEL != 4
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT25_LEVEL) || XCHAL_INT25_LEVEL != 4
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT28_LEVEL) || XCHAL_INT28_LEVEL != 4
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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#if !defined(XCHAL_INT30_LEVEL) || XCHAL_INT30_LEVEL != 4
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#error core-isa.h interrupt level does not match dispatcher!
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#endif
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static inline int _xtensa_handle_one_int1(unsigned int mask)
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{
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int irq;
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if (mask & 0x7f) {
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if (mask & 0x7) {
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if (mask & BIT(0)) {
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mask = BIT(0);
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irq = 0;
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goto handle_irq;
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}
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if (mask & BIT(1)) {
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mask = BIT(1);
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irq = 1;
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goto handle_irq;
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}
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if (mask & BIT(2)) {
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mask = BIT(2);
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irq = 2;
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goto handle_irq;
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}
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} else {
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if (mask & 0x18) {
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if (mask & BIT(3)) {
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mask = BIT(3);
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irq = 3;
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goto handle_irq;
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}
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if (mask & BIT(4)) {
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mask = BIT(4);
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irq = 4;
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goto handle_irq;
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}
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} else {
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if (mask & BIT(5)) {
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mask = BIT(5);
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irq = 5;
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goto handle_irq;
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}
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if (mask & BIT(6)) {
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mask = BIT(6);
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irq = 6;
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goto handle_irq;
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}
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}
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}
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} else {
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if (mask & 0x780) {
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if (mask & 0x180) {
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if (mask & BIT(7)) {
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mask = BIT(7);
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irq = 7;
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goto handle_irq;
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}
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if (mask & BIT(8)) {
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mask = BIT(8);
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irq = 8;
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goto handle_irq;
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}
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} else {
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if (mask & BIT(9)) {
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mask = BIT(9);
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irq = 9;
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goto handle_irq;
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}
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if (mask & BIT(10)) {
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mask = BIT(10);
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irq = 10;
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goto handle_irq;
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}
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}
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} else {
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if (mask & 0x3000) {
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if (mask & BIT(12)) {
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mask = BIT(12);
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irq = 12;
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goto handle_irq;
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}
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if (mask & BIT(13)) {
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mask = BIT(13);
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irq = 13;
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goto handle_irq;
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}
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} else {
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if (mask & BIT(17)) {
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mask = BIT(17);
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irq = 17;
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goto handle_irq;
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}
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if (mask & BIT(18)) {
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mask = BIT(18);
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irq = 18;
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goto handle_irq;
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}
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}
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}
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int3(unsigned int mask)
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{
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int irq;
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if (mask & 0x408800) {
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if (mask & BIT(11)) {
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mask = BIT(11);
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irq = 11;
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goto handle_irq;
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}
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if (mask & BIT(15)) {
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mask = BIT(15);
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irq = 15;
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goto handle_irq;
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}
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if (mask & BIT(22)) {
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mask = BIT(22);
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irq = 22;
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goto handle_irq;
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}
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} else {
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if (mask & BIT(23)) {
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mask = BIT(23);
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irq = 23;
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goto handle_irq;
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}
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if (mask & BIT(27)) {
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mask = BIT(27);
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irq = 27;
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goto handle_irq;
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}
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if (mask & BIT(29)) {
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mask = BIT(29);
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irq = 29;
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goto handle_irq;
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}
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int7(unsigned int mask)
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{
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int irq;
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if (mask & BIT(14)) {
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mask = BIT(14);
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irq = 14;
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goto handle_irq;
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int5(unsigned int mask)
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{
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int irq;
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if (mask & BIT(16)) {
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mask = BIT(16);
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irq = 16;
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goto handle_irq;
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}
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if (mask & BIT(26)) {
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mask = BIT(26);
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irq = 26;
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goto handle_irq;
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}
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if (mask & BIT(31)) {
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mask = BIT(31);
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irq = 31;
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goto handle_irq;
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int2(unsigned int mask)
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{
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int irq;
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if (mask & BIT(19)) {
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mask = BIT(19);
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irq = 19;
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goto handle_irq;
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}
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if (mask & BIT(20)) {
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mask = BIT(20);
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irq = 20;
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goto handle_irq;
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}
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if (mask & BIT(21)) {
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mask = BIT(21);
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irq = 21;
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goto handle_irq;
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int4(unsigned int mask)
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{
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int irq;
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if (mask & 0x3000000) {
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if (mask & BIT(24)) {
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mask = BIT(24);
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irq = 24;
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goto handle_irq;
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}
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if (mask & BIT(25)) {
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mask = BIT(25);
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irq = 25;
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goto handle_irq;
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}
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} else {
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if (mask & BIT(28)) {
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mask = BIT(28);
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irq = 28;
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goto handle_irq;
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}
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if (mask & BIT(30)) {
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mask = BIT(30);
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irq = 30;
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goto handle_irq;
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}
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}
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return 0;
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handle_irq:
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_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);
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return mask;
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}
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static inline int _xtensa_handle_one_int0(unsigned int mask)
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{
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return 0;
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}
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static inline int _xtensa_handle_one_int6(unsigned int mask)
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{
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return 0;
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}
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