zephyr/soc/espressif
Sylvio Alves b38d4300b9 soc: esp32c3: fix TLS flash addressing
When TLS is used, `__tdata_start` is PROVIDED by
"thread-local-storage.ld" using absolute address, which
makes it land in wrong flash address. This causes risc-v startup
code to fail during memcpy/memset.

This PR overrides `__tdata_start` to use ADDR, which will
make sure it is placed in DROM region due to AT keyword.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-06-20 14:07:54 -04:00
..
common soc: espressif: add esp32-c6 support 2024-06-14 18:51:46 -04:00
esp32 soc: espressif: esp32: improve memory utilization 2024-06-19 13:23:47 -04:00
esp32c3 soc: esp32c3: fix TLS flash addressing 2024-06-20 14:07:54 -04:00
esp32c6 soc: esp32c6: Kconfig and .ld updates, DTS and comments fix 2024-06-14 18:51:46 -04:00
esp32s2 soc: espressif: esp32s2: improve memory layout 2024-06-15 05:19:00 -04:00
esp32s3 soc: espressif: esp32s3: add cross segment call check 2024-06-10 16:58:28 +03:00
CMakeLists.txt
Kconfig
Kconfig.defconfig
Kconfig.soc
soc.yml soc: espressif: add esp32-c6 support 2024-06-14 18:51:46 -04:00