zephyr/soc/espressif/common/Kconfig.defconfig

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# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ESP32C3 || SOC_SERIES_ESP32C6
config GEN_ISR_TABLES
default y
config GEN_SW_ISR_TABLE
default y
config GEN_IRQ_VECTOR_TABLE
default n
config DYNAMIC_INTERRUPTS
default y
config ISR_STACK_SIZE
default 2048
config ATOMIC_OPERATIONS_C
default y
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 16000000
config SYS_CLOCK_TICKS_PER_SEC
default 1000
config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE
default n
config SOC_FLASH_ESP32
default y
if BOOTLOADER_MCUBOOT
config HAS_FLASH_LOAD_OFFSET
default y
config MCUBOOT_GENERATE_UNSIGNED_IMAGE
default y
config MCUBOOT_GENERATE_CONFIRMED_IMAGE
default y
config ROM_START_OFFSET
default 0x20
endif # BOOTLOADER_MCUBOOT
endif # SOC_SERIES_ESP32C3
if SOC_SERIES_ESP32 || SOC_SERIES_ESP32S2 || SOC_SERIES_ESP32S3
# Xtensa default options for ESP32 family
config XTENSA_RESET_VECTOR
default n
config XTENSA_USE_CORE_CRT1
default n
config GEN_ISR_TABLES
default y
config GEN_IRQ_VECTOR_TABLE
default n
config CLOCK_CONTROL
default y
config SOC_FLASH_ESP32
default y
config SYS_CLOCK_HW_CYCLES_PER_SEC
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
config XTENSA_CCOUNT_HZ
default SYS_CLOCK_HW_CYCLES_PER_SEC
config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE
default n
if BOOTLOADER_MCUBOOT
config HAS_FLASH_LOAD_OFFSET
default y
config MCUBOOT_GENERATE_UNSIGNED_IMAGE
default y
config MCUBOOT_GENERATE_CONFIRMED_IMAGE
default y
config ROM_START_OFFSET
default 0x20
endif # BOOTLOADER_MCUBOOT
endif # SOC_SERIES_ESP32 || SOC_SERIES_ESP32S2 || SOC_SERIES_ESP32S3