zephyr/arch/nios2/soc/nios2f-zephyr/cpu
Andrew Boie 251317c1bf nios2f-zephyr: commit additional source files
These are necessary to edit the CPU design in QSYS.
These originate from the F core archive supplied by Altera.

Change-Id: Ic03bd8738ae58dc154b5eaef91154fadaa61c491
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-08 21:20:26 +00:00
..
README
ghrd_10m50da.dpf nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_10m50da.qpf nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_10m50da.qsf nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_10m50da.qsys nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_10m50da.qws nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_10m50da.sof
ghrd_10m50da.sopcinfo
ghrd_10m50da_top.v nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
ghrd_timing.sdc nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00
stp1.stp nios2f-zephyr: commit additional source files 2016-07-08 21:20:26 +00:00

README

These files are a Nios II/F CPU design provided by Altera for evaluating
Zephyr on Nios II. This design is intended for the Altera MAX10 10M50 Rec C
development board. You can find more information about this board here:

https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-10-fpga-development-kit.html

You will need the Quartus SDK in order to modify this CPU or flash it onto
a supported device. The Lite version of Quartus may be obtained without charge
from the following link:

http://dl.altera.com/?edition=lite

To flash this CPU, use the nios2-configure-sof tool:

$ nios2-configure-sof ghrd_10m50da.sof

The 'make flash' target will also package up the kernel and CPU into a single
.pof file which will then put the image onto the device using quartus_pgm tool.