33 lines
608 B
Plaintext
33 lines
608 B
Plaintext
/*
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* Copyright (c) 2018 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/f0/stm32f030.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(8)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(64)>;
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};
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <26 3>;
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status = "disabled";
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label = "SPI_2";
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};
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};
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};
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