52 lines
961 B
Plaintext
52 lines
961 B
Plaintext
/*
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* Copyright (c) 2019, 2020 Antony Pavlov <antonynpavlov@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/l1/stm32l152.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(80)>;
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};
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soc {
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flash-controller@40023c00 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(512)>;
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};
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};
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timers5: timers@40000c00 {
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compatible = "st,stm32-timers";
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reg = <0x40000c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
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resets = <&rctl STM32_RESET(APB1, 3U)>;
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interrupts = <45 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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#pwm-cells = <3>;
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};
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};
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eeprom: eeprom@8080000{
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reg = <0x08080000 DT_SIZE_K(16)>;
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};
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rtc@40002800 {
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bbram: backup_regs {
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compatible = "st,stm32-bbram";
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st,backup-regs = <32>;
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status = "disabled";
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};
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};
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};
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};
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