zephyr/samples/boards/mec15xxevb_assy6853/power_management
Daniel Leung 2e7831562a samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep
The origin for sleeping for 3ms after coming out of deep sleep
was to wait for PLL to lock so that UART would not send
garbage characters due to incorrect clock. In the deep sleep
code, it spins to wait for the PLL to lock so there is no need
to wait for 3ms in the app. So shorten it like other busy wait.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-10 07:48:33 -04:00
..
src samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep 2020-04-10 07:48:33 -04:00
CMakeLists.txt
README.rst
prj.conf
sample.yaml

README.rst

.. mec15xxevb-sample:

MEC15xx sample board test application
#####################################

Overview
********

This sample demonstrates power management features on MEC15xx-based boards.
It showcase simple app that allows to enter into light and deep sleep.

Building and Running
********************

The sample can be built and executed on boards using west.
No pins configurations, except GPIO014 is used as indicator for entry/exit.


Sample output
=============

.. code-block:: console

   Wake from Light Sleep
   Wake from Deep Sleep
   ResumeBBBAA
   Wake from Light Sleep
   Suspend...
   Wake from Deep Sleep
   ResumeBBBAA

note:: The values shown above might differ.