29 lines
730 B
C
29 lines
730 B
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/irq.h>
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/*
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* In RISC-V there is no conventional way to handle CPU power save.
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* Each RISC-V SOC handles it in its own way.
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* Hence, by default, arch_cpu_idle and arch_cpu_atomic_idle functions just
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* unlock interrupts and return to the caller, without issuing any CPU power
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* saving instruction.
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*
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* Nonetheless, define the default arch_cpu_idle and arch_cpu_atomic_idle
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* functions as weak functions, so that they can be replaced at the SOC-level.
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*/
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void __weak arch_cpu_idle(void)
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{
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irq_unlock(MSTATUS_IEN);
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}
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void __weak arch_cpu_atomic_idle(unsigned int key)
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{
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irq_unlock(key);
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}
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