zephyr

History

Anas Nashif 696aa869d5 nios2: move soc to top-level dir soc/ Move the SoC outside of the architecture tree and put them at the same level as boards and architectures allowing both SoCs and boards to be maintained outside the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>		2018-09-13 00:56:48 -04:00
..
README	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da.qpf	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da.qsf	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da.qsys	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da.sof	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da.sopcinfo	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_10m50da_top.v	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00
ghrd_timing.sdc	nios2: move soc to top-level dir soc/	2018-09-13 00:56:48 -04:00

README

These files are a Nios II/F CPU design provided by Altera for evaluating
Zephyr on Nios II. This design is intended for the Altera MAX10 10M50 Rec C
development board. You can find more information about this board here:

https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-10-fpga-development-kit.html

You will need the Quartus SDK in order to modify this CPU or flash it onto
a supported device. The Lite version of Quartus may be obtained without charge
from the following link:

http://dl.altera.com/?edition=lite

To flash this CPU, use the nios2-configure-sof tool:

$ nios2-configure-sof ghrd_10m50da.sof

The 'make flash' target will also package up the kernel and CPU into a single
.pof file which will then put the image onto the device using quartus_pgm tool.