zephyr/arch/xtensa/core
Leandro Pereira 0e08b946de soc: esp32: Define __start as a C function
The first stage bootloader, part of the ESP32 ROM, already sets up
a stack that's sufficient to execute C programs.  So, instead of
implementing __stack() in assembly, do it in C to simplify things
slightly.

This ESP32-specific initialization will perform the following:

  - Disable the watchdog timer that's enabled by the bootloader
  - Move exception handlers to IRAM
  - Disable normal interrupts
  - Disable the second CPU
  - Zero out the BSS segment

Things that might be performed in the future include setting up the
CPU frequency, memory protection regions, and enabling the flash
cache.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
..
offsets xtensa port: Clear the CP descriptor of new created thread. 2017-04-20 16:01:55 +00:00
startup xtensa: optionally build reset vector code 2017-05-12 12:56:12 -04:00
Makefile soc: esp32: Define __start as a C function 2017-06-21 12:35:49 -04:00
atomic.S xtensa: fix numerous checkpatch issues 2017-02-13 11:39:03 -08:00
cpu_idle.c xtensa: use inline assembly instead of XT_* macros 2017-05-11 16:51:56 -04:00
crt1.S xtensa: merge crt1-*.S 2017-05-12 12:56:12 -04:00
fatal.c stack_sentinel: hang system on failure 2017-06-08 13:49:36 -05:00
irq_manage.c arch: convert to using newly introduced integer sized types 2017-04-21 12:08:12 +00:00
irq_offload.c kernel: remove all remaining references to nanokernel 2017-04-10 20:21:10 +00:00
sw_isr_table.S linker: move all linker headers to include/linker 2017-06-18 09:24:04 -05:00
swap.S stack_sentinel: change cooperative check 2017-06-08 13:49:36 -05:00
thread.c kernel: add k_thread_create() API 2017-05-11 20:24:22 -04:00
xt_zephyr.S debug: add stack sentinel feature 2017-05-13 15:14:41 -04:00
xtensa_context.S xtensa: fix numerous checkpatch issues 2017-02-13 11:39:03 -08:00
xtensa_intr.c
xtensa_intr_asm.S
xtensa_vectors.S xtensa port: Fixed crash on interrupt handlers when logger is enabled. 2017-04-28 15:49:01 +00:00