13 lines
333 B
Plaintext
13 lines
333 B
Plaintext
# Xtensa board configuration
|
|
|
|
# Copyright (c) 2020 Intel Corporation
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
config BOARD_INTEL_ADSP_CAVS25
|
|
bool "Intel ADSP CAVS 2.5"
|
|
depends on SOC_SERIES_INTEL_ADSP_CAVS
|
|
|
|
config BOARD_INTEL_ADSP_CAVS25_TGPH
|
|
bool "Intel ADSP CAVS 2.5 for Tiger Lake H PCH"
|
|
depends on SOC_SERIES_INTEL_ADSP_CAVS
|