zephyr/boards/riscv/litex_vexriscv/doc
Robert Winkler b18309c0d7 boards: doc: Add information about generating litex_vexriscv SoC
This commit adds more information about the litex_vexrscv board
target, including references to related projects and instruction
about generating bitstream for the Digilent Arty A7-35T Board.

Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-16 12:49:16 -05:00
..
img
index.rst