145 lines
2.5 KiB
Plaintext
145 lines
2.5 KiB
Plaintext
/*
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* Copyright (c) 2022 Benjamin Björnsson <benjamin.bjornsson@gmail.com>.
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* Copyright (c) 2024 DNDG srl
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7/stm32h747Xi_m7.dtsi>
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#include <st/h7/stm32h747xihx-pinctrl.dtsi>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include "arduino_opta-common.dtsi"
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/ {
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model = "Arduino OPTA M7 core Programmable Logic Controller";
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compatible = "arduino,opta-m7";
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chosen {
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zephyr,console = &cdc_acm_uart0;
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zephyr,shell-uart = &cdc_acm_uart0;
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zephyr,cdc-acm-uart0 = &cdc_acm_uart0;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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};
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ethernet_phy_en: ethernet_phy_en {
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compatible = "regulator-fixed";
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regulator-name = "ethernet-phy-reset-release";
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enable-gpios = <&gpioj 15 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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status = "okay";
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};
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sdram2: sdram@d0000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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device_type = "memory";
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reg = <0xd0000000 DT_SIZE_M(32)>;
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zephyr,memory-region = "SDRAM2";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
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};
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};
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zephyr_udc0: &usbotg_fs {
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pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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cdc_acm_uart0: cdc_acm_uart0 {
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compatible = "zephyr,cdc-acm-uart";
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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hse-bypass;
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status = "okay";
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};
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&clk_lse {
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clock-frequency = <32768>;
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lse-bypass;
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status = "okay";
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};
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&clk_hsi {
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hsi-div = <1>;
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status = "okay";
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};
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&clk_hsi48 {
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/* HSI48 required for USB */
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status = "okay";
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};
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&pll {
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div-m = <5>;
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mul-n = <160>;
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div-p = <2>;
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div-r = <2>;
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div-q = <10>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(400)>;
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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slot0_partition: partition@40000 {
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label = "image-0";
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reg = <0x00040000 DT_SIZE_K(768)>;
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};
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};
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};
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&usbotg_fs {
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status = "okay";
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};
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&usbotg_hs {
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status = "disabled";
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};
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&cdc_acm_uart0 {
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status = "okay";
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};
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&mac {
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pinctrl-0 = <
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ð_ref_clk_pa1
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ð_crs_dv_pa7
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ð_rxd0_pc4
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ð_rxd1_pc5
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ð_tx_en_pg11
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ð_txd1_pg12
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ð_txd0_pg13
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>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
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pinctrl-names = "default";
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ethernet-phy@0 {
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compatible = "ethernet-phy";
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reg = <0x00>;
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status = "okay";
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};
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};
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&rng {
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status = "okay";
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};
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