zephyr/boards/riscv/rv32m1_vega
Alex Porosanu 453ee5e782 soc: riscv32: fix zero-riscy zephyr,flash node
For OpenVega board, in the case of the Zero Riscy core,
the flash partition used for the code and data is the
M0 ARM core's 256KB flash region. This is closest to
the RISC core.
The m0_flash node defines where the interrupt vector
is located for the Zero Riscy core, and one needs to
restrict the application so its interrupt vector is
placed accordingly.

Fixes: 34b0516466 ("boards: riscv32: rv32m1_vega:
                      enable MCUboot for ri5cy core")

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
2019-08-07 07:27:51 -05:00
..
doc
support
CMakeLists.txt
Kconfig.board
Kconfig.defconfig
board.cmake
pinmux.c
rv32m1_vega.dtsi
rv32m1_vega_ri5cy.dts
rv32m1_vega_ri5cy.yaml
rv32m1_vega_ri5cy_defconfig
rv32m1_vega_zero_riscy.dts
rv32m1_vega_zero_riscy.yaml
rv32m1_vega_zero_riscy_defconfig