74 lines
1.7 KiB
Plaintext
74 lines
1.7 KiB
Plaintext
# Kconfig - Microchip MEC1501 MCU core series
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#
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# Copyright (c) 2018 Intel Corporation
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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choice
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prompt "MEC1501 Selection"
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depends on SOC_SERIES_MEC1501X
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config SOC_MEC1501_HSZ
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bool "MEC1501_HSZ"
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select HAS_MEC_HAL
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endchoice
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config RTOS_TIMER
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bool "MEC1501 RTOS timer"
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config SOC_MEC1501_PROC_CLK_DIV
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int "PROC_CLK_DIV"
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default 1
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range 1 48
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help
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This divisor defines a ratio between processor clock (HCLK)
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and master clock (MCK):
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HCLK = MCK / PROC_CLK_DIV
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Allowed divider values: 1, 3, 4, 16, and 48.
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config SOC_MEC1501_EXT_32K
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bool "Use external 32KHz clock source"
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default n
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help
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Use an external 32768 Hz clock source for PLL reference
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clock.
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Say y if you want to use an external source for the PLL
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32KHz reference clock.
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Say n to use the +/-2% internal silicon oscillator.
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config SOC_MEC1501_EXT_32K_CRYSTAL
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bool "External 32KHz is a crystal"
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depends on SOC_MEC1501_EXT_32K
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default n
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help
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Choose a crystal as the external 32KHz source.
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Say y if you wish to use a crystal as the external
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32KHz clock source.
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Saying n will select the 32KHZ_IN pin as the external
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32KHz clock source.
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config SOC_MEC1501_EXT_32K_PARALLEL_CRYSTAL
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bool "Use parallel connected 32KHz crystal"
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depends on SOC_MEC1501_EXT_32K_CRYSTAL
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default n
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help
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Choose external 32KHz crystal connection.
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Say y if the crystal is connected parallel between
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the XTAL1 and XTAL pins.
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Say n if the crystal is connected single ended to
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the XTAL2 pin or a 32KHz square wave is on XTAL2.
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config SOC_MEC1501_VTR3_1_8V
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bool "VTR3 power rail is tied to 1.8V"
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help
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Set this is if VTR3 power sourcejumper in the board is changed.
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