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zephyr/soc/arm/microchip_mec/mec1501/Kconfig.soc

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soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
# Kconfig - Microchip MEC1501 MCU core series
#
# Copyright (c) 2018 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
choice
prompt "MEC1501 Selection"
depends on SOC_SERIES_MEC1501X
config SOC_MEC1501_HSZ
bool "MEC1501_HSZ"
select HAS_MEC_HAL
endchoice
soc: mchp: Add configuration option to switch timer drivers Expose in MEC1501 SoC and option to switch between OS timer drivers Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-07-31 07:22:55 +08:00
config RTOS_TIMER
bool "MEC1501 RTOS timer"
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
config SOC_MEC1501_PROC_CLK_DIV
int "PROC_CLK_DIV"
default 1
range 1 48
help
This divisor defines a ratio between processor clock (HCLK)
and master clock (MCK):
HCLK = MCK / PROC_CLK_DIV
Allowed divider values: 1, 3, 4, 16, and 48.
config SOC_MEC1501_EXT_32K
bool "Use external 32KHz clock source"
default n
help
Use an external 32768 Hz clock source for PLL reference
clock.
Say y if you want to use an external source for the PLL
32KHz reference clock.
Say n to use the +/-2% internal silicon oscillator.
config SOC_MEC1501_EXT_32K_CRYSTAL
bool "External 32KHz is a crystal"
depends on SOC_MEC1501_EXT_32K
drivers : timer : Add MEC1501 32KHz kernel timer driver Add a kernel timer driver for the MEC1501 32KHz RTOS timer. This timer is a count down 32-bit counter clocked at a fixed 32768 Hz. It features one-shot, auto-reload, and halt count down while the Cortex-M is halted by JTAG/SWD. This driver is based on the new Intel local APIC driver. The driver was tuned for accuracy at small sleep values. Added a work-around for RTOS timer restart issue. RTOS timer driver requires board ticks per second to be 32768 if tickless operation is configured. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-06-13 03:22:43 +08:00
default n
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
help
Choose a crystal as the external 32KHz source.
Say y if you wish to use a crystal as the external
32KHz clock source.
Saying n will select the 32KHZ_IN pin as the external
32KHz clock source.
config SOC_MEC1501_EXT_32K_PARALLEL_CRYSTAL
bool "Use parallel connected 32KHz crystal"
depends on SOC_MEC1501_EXT_32K_CRYSTAL
drivers : timer : Add MEC1501 32KHz kernel timer driver Add a kernel timer driver for the MEC1501 32KHz RTOS timer. This timer is a count down 32-bit counter clocked at a fixed 32768 Hz. It features one-shot, auto-reload, and halt count down while the Cortex-M is halted by JTAG/SWD. This driver is based on the new Intel local APIC driver. The driver was tuned for accuracy at small sleep values. Added a work-around for RTOS timer restart issue. RTOS timer driver requires board ticks per second to be 32768 if tickless operation is configured. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-06-13 03:22:43 +08:00
default n
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
help
Choose external 32KHz crystal connection.
Say y if the crystal is connected parallel between
the XTAL1 and XTAL pins.
Say n if the crystal is connected single ended to
the XTAL2 pin or a 32KHz square wave is on XTAL2.
boards: mchp: Add option to switch GPIO bank voltage Add KConfig board support to match board jumper settings Failing to update bank selection will affect GPIOs tied to VTR3 Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-26 02:05:03 +08:00
config SOC_MEC1501_VTR3_1_8V
bool "VTR3 power rail is tied to 1.8V"
help
Set this is if VTR3 power sourcejumper in the board is changed.