916c059f3d
update pin control implementation to use offsets for pin registers instead of pin/port combination, to permit additional flexibility for lpc devices with non contiguous register layouts. Update LPC55s69 pin control names to align with newly generated pin control header. This change also requires an update to the NXP HAL to use the new pin control headers with offsets. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com> |
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.. | ||
CMakeLists.txt | ||
Kconfig | ||
Kconfig.b91 | ||
Kconfig.cc13xx_cc26xx | ||
Kconfig.gd32 | ||
Kconfig.kinetis | ||
Kconfig.lpc_iocon | ||
Kconfig.mcux | ||
Kconfig.nrf | ||
Kconfig.rcar | ||
Kconfig.rpi_pico | ||
Kconfig.sam | ||
Kconfig.sam0 | ||
Kconfig.sifive | ||
Kconfig.stm32 | ||
Kconfig.xec | ||
common.c | ||
pfc_rcar.c | ||
pinctrl_b91.c | ||
pinctrl_cc13xx_cc26xx.c | ||
pinctrl_gd32_af.c | ||
pinctrl_gd32_afio.c | ||
pinctrl_kinetis.c | ||
pinctrl_lpc_iocon.c | ||
pinctrl_mchp_xec.c | ||
pinctrl_mcux_rt.c | ||
pinctrl_nrf.c | ||
pinctrl_rpi_pico.c | ||
pinctrl_sam.c | ||
pinctrl_sam0.c | ||
pinctrl_sifive.c | ||
pinctrl_stm32.c |