138 lines
2.7 KiB
Plaintext
138 lines
2.7 KiB
Plaintext
/*
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* Copyright 2018 Foundries.io Ltd
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <riscv32/rv32m1.dtsi>
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/ {
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aliases {
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intmux = &intmux1;
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system-lptmr = &lptmr2;
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};
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cpus {
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/delete-node/ cpu@0;
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};
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};
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&m0_flash {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* This configuration assumes the Arm cores are disabled, as
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* these base addresses contain the Arm core vector tables if
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* they are used.
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*/
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zero_riscy_code_partition: partition@1000000 {
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label = "zero-riscy-code";
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reg = <0x01000000 0x0003ff00>;
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};
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zero_riscy_vector_partition: partition@3ff00 {
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label = "zero-riscy-vector";
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reg = <0x0003ff00 0x100>;
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};
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};
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};
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/*
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* INTMUX channels below are somewhat arbitrary.
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*
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* The peripherals are all placed in channel 0. This can be overridden with
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* overlays, e.g. to manage IRQ priorities, and it will Just Work, but using
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* fewer channels here allows disabling unused ones in Kconfig, making the
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* binary smaller.
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*
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* Each enabled channel requires 256 bytes in _sw_isr_table, so the savings for
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* disabling channels can add up.
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*/
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&intmux1 {
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interrupt-parent = <&event1>;
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interrupts = <INTMUX_CH0_IRQ>, <INTMUX_CH1_IRQ>, <INTMUX_CH2_IRQ>, <INTMUX_CH3_IRQ>, <INTMUX_CH4_IRQ>, <INTMUX_CH5_IRQ>, <INTMUX_CH6_IRQ>, <INTMUX_CH7_IRQ>;
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};
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&lptmr0 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 6)>;
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};
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&lptmr1 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 7)>;
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};
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&lptmr2 {
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interrupt-parent = <&event1>;
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interrupts = <14>;
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};
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&gpioa {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 25)>;
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};
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&gpiob {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 26)>;
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};
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&gpioc {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 27)>;
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};
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&gpiod {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 28)>;
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};
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&gpioe {
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interrupt-parent = <&event1>;
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interrupts = <21>;
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};
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&uart0 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 21)>;
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};
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&uart1 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 22)>;
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};
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&uart2 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 23)>;
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};
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&uart3 {
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interrupt-parent = <&event1>;
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interrupts = <20>;
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};
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&i2c0 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 13)>;
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};
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&i2c1 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 14)>;
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};
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&i2c2 {
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interrupt-parent = <&intmux1>;
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interrupts = <INTMUX_LEVEL2_IRQ(INTMUX_CH0, 15)>;
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};
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&i2c3 {
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interrupt-parent = <&event1>;
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interrupts = <16>;
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};
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