zephyr/boards/xtensa
Fabio Baltieri d7504ab474 ethernet: esp32: make phy a phandle of the ethernet device
Change the eth-phy definition so that the phy is pointed by a phandle
rather than a child node, make the phy device a child of mdio. This
makes more sense from a devicetree hirearchy where the phandles have to
be initialized before the device itself, allows keeping the priorities
in check with CHECK_INIT_PRIORITIES.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-08-02 18:12:14 -04:00
..
esp32_devkitc_wroom soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32_devkitc_wrover soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32_ethernet_kit ethernet: esp32: make phy a phandle of the ethernet device 2023-08-02 18:12:14 -04:00
esp32_net soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s2_franzininho soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s2_saola soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s3_devkitm soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp_wrover_kit soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
heltec_wifi_lora32_v2 soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
intel_adsp_ace15_mtpm boards: xtensa: Set DCACHE_LINE_SIZE for all SOF-supported Intel SoCs 2023-05-17 18:34:24 -04:00
intel_adsp_ace20_lnl boards: intel_adsp_ace20_lnl: build with Zephyr SDK 2023-05-17 18:58:54 -04:00
intel_adsp_cavs25 boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
m5stickc_plus soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
nxp_adsp_imx8 boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
nxp_adsp_imx8m boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
nxp_adsp_imx8x boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
odroid_go soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
olimex_esp32_evb soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
qemu_xtensa yamllint: indentation: fix files in boards/ 2023-01-04 14:23:53 +01:00
xiao_esp32s3 soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
xt-sim
index.rst docs: boards: fix capitalization of board architectures 2023-07-06 09:15:59 +02:00