304 lines
7.2 KiB
Plaintext
304 lines
7.2 KiB
Plaintext
# Nordic Semiconductor nRF53 MCU line
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_NRF53X
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config SOC_NRF5340_CPUAPP
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bool
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select CPU_HAS_NRF_IDAU
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select CPU_HAS_FPU
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select ARMV8_M_DSP
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select HAS_HW_NRF_CC312
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select HAS_HW_NRF_COMP
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_CTRLAP
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select HAS_HW_NRF_DCNF
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select HAS_HW_NRF_DPPIC
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_EGU1
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select HAS_HW_NRF_EGU2
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select HAS_HW_NRF_EGU3
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select HAS_HW_NRF_EGU4
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select HAS_HW_NRF_EGU5
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIO1
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_I2S
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select HAS_HW_NRF_IPC
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select HAS_HW_NRF_KMU
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select HAS_HW_NRF_LPCOMP
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select HAS_HW_NRF_MUTEX
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select HAS_HW_NRF_NFCT
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select HAS_HW_NRF_NVMC_PE
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select HAS_HW_NRF_OSCILLATORS
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select HAS_HW_NRF_PDM
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_PWM0
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select HAS_HW_NRF_PWM1
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select HAS_HW_NRF_PWM2
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select HAS_HW_NRF_PWM3
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select HAS_HW_NRF_QDEC0
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select HAS_HW_NRF_QDEC1
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select HAS_HW_NRF_QSPI
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select HAS_HW_NRF_REGULATORS
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select HAS_HW_NRF_RESET
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SAADC
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIM1
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select HAS_HW_NRF_SPIM2
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select HAS_HW_NRF_SPIM3
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select HAS_HW_NRF_SPIM4
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_SPIS1
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select HAS_HW_NRF_SPIS2
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select HAS_HW_NRF_SPIS3
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select HAS_HW_NRF_SPU
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIM1
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select HAS_HW_NRF_TWIM2
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select HAS_HW_NRF_TWIM3
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_TWIS1
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select HAS_HW_NRF_TWIS2
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select HAS_HW_NRF_TWIS3
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_UARTE1
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select HAS_HW_NRF_UARTE2
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select HAS_HW_NRF_UARTE3
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select HAS_HW_NRF_USBD
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select HAS_HW_NRF_USBREG
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select HAS_HW_NRF_VMC
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select HAS_HW_NRF_WDT0
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select HAS_HW_NRF_WDT1
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config SOC_NRF5340_CPUNET
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bool
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select HAS_HW_NRF_ACL
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_CCM
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select HAS_HW_NRF_CCM_LFLEN_8BIT
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select HAS_HW_NRF_DPPIC
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select HAS_HW_NRF_ECB
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIO1
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_IPC
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select HAS_HW_NRF_NVMC_PE
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_RADIO_BLE_2M
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select HAS_HW_NRF_RADIO_BLE_CODED
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select HAS_HW_NRF_RADIO_IEEE802154
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select HAS_HW_NRF_RNG
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_SWI0
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select HAS_HW_NRF_SWI1
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select HAS_HW_NRF_SWI2
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select HAS_HW_NRF_SWI3
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select HAS_HW_NRF_TEMP
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_WDT
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select HAS_NO_PM
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choice
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prompt "nRF53x MCU Selection"
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config SOC_NRF5340_CPUAPP_QKAA
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bool "NRF5340_CPUAPP_QKAA"
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select SOC_NRF5340_CPUAPP
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config SOC_NRF5340_CPUNET_QKAA
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bool "NRF5340_CPUNET_QKAA"
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select SOC_NRF5340_CPUNET
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endchoice
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if SOC_NRF5340_CPUAPP
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config SOC_DCDC_NRF53X_APP
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bool
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help
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Enable nRF53 series System on Chip Application MCU DC/DC converter.
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config SOC_DCDC_NRF53X_NET
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bool
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help
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Enable nRF53 series System on Chip Network MCU DC/DC converter.
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config SOC_DCDC_NRF53X_HV
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bool
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help
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Enable nRF53 series System on Chip High Voltage DC/DC converter.
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if !TRUSTED_EXECUTION_NONSECURE || BUILD_WITH_TFM
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config SOC_ENABLE_LFXO
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bool "LFXO"
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default y
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help
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Enable the low-frequency oscillator (LFXO) functionality on XL1 and
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XL2 pins.
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This option must be enabled if either application or network core is
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to use the LFXO. Otherwise, XL1 and XL2 pins will behave as regular
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GPIOs.
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choice SOC_LFXO_LOAD_CAPACITANCE
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prompt "LFXO load capacitance"
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depends on SOC_ENABLE_LFXO
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default SOC_LFXO_CAP_INT_7PF
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config SOC_LFXO_CAP_EXTERNAL
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bool "Use external load capacitors"
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config SOC_LFXO_CAP_INT_6PF
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bool "6 pF internal load capacitance"
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config SOC_LFXO_CAP_INT_7PF
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bool "7 pF internal load capacitance"
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config SOC_LFXO_CAP_INT_9PF
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bool "9 pF internal load capacitance"
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endchoice
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choice SOC_HFXO_LOAD_CAPACITANCE
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prompt "HFXO load capacitance"
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default SOC_HFXO_CAP_DEFAULT
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config SOC_HFXO_CAP_DEFAULT
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bool "SoC default"
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help
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When this option is used, the SoC initialization routine does not
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touch the XOSC32MCAPS register value, so the default setting for
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the SoC is in effect. Please note that this may not necessarily be
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the reset value (0) for the register, as the register can be set
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during the device trimming in the SystemInit() function.
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config SOC_HFXO_CAP_EXTERNAL
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bool "Use external load capacitors"
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config SOC_HFXO_CAP_INTERNAL
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bool "Use internal load capacitors"
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endchoice
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config SOC_HFXO_CAP_INT_VALUE_X2
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int "Doubled value of HFXO internal load capacitors (in pF)"
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depends on SOC_HFXO_CAP_INTERNAL
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range 14 40
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help
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Internal capacitors ranging from 7.0 pF to 20.0 pF in 0.5 pF steps
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can be enabled on pins XC1 and XC2. This option specifies doubled
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capacitance value for the two capacitors. Set it to 14 to get 7.0 pF
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for each capacitor, 15 to get 7.5 pF, and so on.
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endif # !TRUSTED_EXECUTION_NONSECURE || BUILD_WITH_TFM
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endif # SOC_NRF5340_CPUAPP
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config NRF_ENABLE_CACHE
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bool "Cache"
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depends on (SOC_NRF5340_CPUAPP && (!TRUSTED_EXECUTION_NONSECURE || BUILD_WITH_TFM)) \
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|| SOC_NRF5340_CPUNET
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default y
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help
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Instruction and Data cache is available on nRF5340 CPUAPP
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(Application MCU). It may only be accessed by Secure code.
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Instruction cache only (I-Cache) is available in nRF5340
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CPUNET (Network MCU).
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config BUILD_WITH_TFM
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# TF-M nRF53 platform enables the cache unconditionally.
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select NRF_ENABLE_CACHE if SOC_NRF5340_CPUAPP
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config NRF53_SYNC_RTC
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bool "RTC clock synchronization"
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default y if LOG && !LOG_MODE_MINIMAL
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depends on NRF_RTC_TIMER
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select NRFX_DPPI
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select MBOX if !IPM
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if NRF53_SYNC_RTC
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module = SYNC_RTC
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module-str = Synchronized RTC
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source "subsys/logging/Kconfig.template.log_config"
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config NRF53_SYNC_RTC_INIT_PRIORITY
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int "nRF53 Synchronized RTC init priority"
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default APPLICATION_INIT_PRIORITY
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help
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nRF53 Synchronized RTC initialization priority.
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config NRF_RTC_TIMER_USER_CHAN_COUNT
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default 1
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config NRF53_SYNC_RTC_LOG_TIMESTAMP
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bool "Use Synchronized RTC for logging timestamp"
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default y
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config NRF53_SYNC_RTC_IPM_OUT
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int "IPM channel from APP to NET"
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range 0 15
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default 7 if SOC_NRF5340_CPUAPP
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default 8
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config NRF53_SYNC_RTC_IPM_IN
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int "IPM channel from APP to NET"
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range 0 15
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default 8 if SOC_NRF5340_CPUAPP
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default 7
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ipm_num = 0
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 1
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 2
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 3
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 4
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 5
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 6
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 7
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 8
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 9
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 10
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 11
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 12
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 13
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 14
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rsource "Kconfig.sync_rtc_ipm"
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ipm_num = 15
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rsource "Kconfig.sync_rtc_ipm"
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endif # NRF53_SYNC_RTC
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endif # SOC_SERIES_NRF53X
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