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zephyr/arch/xtensa/soc
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Sathish Kuttan 824bcaca52 xtensa: intel_s1000: Add SoC level SYS_INIT 
Added a SYS_INIT for SoC level initialization of Intel S1000
Added routines for setting up resource ownership for
    DMA, I2S
Added routine to setup power gating and clock configuration

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
 		2018-08-19 11:06:09 -07:00
..
D_108mini cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
D_212GP cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
D_233L cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
XRC_D2PM_5swIrq cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
XRC_FUSION_AON_ALL_LM cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
esp32 esp32: include register headers in soc.h 2018-07-16 19:00:32 -04:00
hifi2_std cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
hifi3_bd5 cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
hifi3_bd5_call0 cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
hifi4_bd7 cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
hifi_mini cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
hifi_mini_4swIrq cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
intel_s1000 xtensa: intel_s1000: Add SoC level SYS_INIT 2018-08-19 11:06:09 -07:00
sample_controller cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00