146 lines
2.8 KiB
Plaintext
146 lines
2.8 KiB
Plaintext
#include "armv6-m.dtsi"
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#include <dt-bindings/clock/kinetis_sim.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m0+";
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reg = <0>;
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};
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};
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sram0: memory@1FFFF000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x1FFFF000 0x4000>;
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};
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soc {
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flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfa";
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label = "FLASH_CTRL";
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reg = <0x40020000 0x14>;
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interrupts = <5 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "MCUX_FLASH";
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reg = <0 0x20000>;
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erase-block-size = <1024>;
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write-block-size = <4>;
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};
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <8 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <9 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
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label = "I2C_1";
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status = "disabled";
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};
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sim: sim@40047000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40047000 0x1060>;
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label = "SIM";
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clk-divider-core = <1>;
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clk-divider-bus = <2>;
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clk-divider-flexbus = <3>;
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clk-divider-flash = <5>;
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clock-controller;
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#clock-cells = <3>;
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};
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uart0: uart@4006A000 {
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compatible = "nxp,kinetis-lpsci";
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reg = <0x4006A000 0xc>;
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interrupts = <12 0>;
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clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 10>;
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label = "UART_0";
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status = "disabled";
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff000 0x40>;
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interrupts = <30 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff040 0x40>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff080 0x40>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff0c0 0x40>;
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interrupts = <31 2>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff100 0x40>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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