18 lines
542 B
Plaintext
18 lines
542 B
Plaintext
/* SoC level DTS fixup file */
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#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED
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#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL
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#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED
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#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL
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#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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/* End of SoC Level DTS fixup file */
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