zephyr/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts

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/*
* Copyright 2022,2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nxp/nxp_mimx93_a55.dtsi>
#include "imx93_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX93 A55";
compatible = "fsl,mimx93";
chosen {
zephyr,console = &lpuart2;
zephyr,shell-uart = &lpuart2;
zephyr,sram = &sram0;
};
cpus {
cpu@0 {
status = "disabled";
};
};
sram0: memory@d0000000 {
reg = <0xd0000000 DT_SIZE_M(1)>;
};
aliases {
led0 = &led_r;
led1 = &led_g;
sw0 = &btn_1;
};
leds {
compatible = "gpio-leds";
led_r: led_r {
label = "LED_R";
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
};
led_g: led_g {
label = "LED_G";
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
};
led_b: led_b {
label = "LED_B";
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
btn_1: btn_1{
label = "BTN1";
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};
btn_2: btn_2{
label = "BTN2";
gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
};
};
};
&enet {
status = "okay";
};
&enet_mac {
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rgmii";
status = "okay";
};
&enet_mdio {
pinctrl-0 = <&pinmux_mdio>;
pinctrl-names = "default";
status = "okay";
phy: phy@0 {
compatible = "realtek,rtl8211f";
reg = <2>;
status = "okay";
};
};
&lpuart1 {
status = "disabled";
current-speed = <115200>;
/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
};
&lpuart2 {
status = "okay";
current-speed = <115200>;
/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};
&lpi2c1 {
status = "disabled";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
&lpi2c2 {
status = "disabled";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c2_default>;
pinctrl-names = "default";
mfd0:adp5585@34 {
compatible = "adi,adp5585";
reg = <0x34>;
status = "disabled";
gpio_exp0: adp5585_gpio {
compatible = "adi,adp5585-gpio";
gpio-controller;
#gpio-cells = <2>;
ngpios = <13>;
gpio-reserved-ranges = <5 3>;
/*
* This device has non-contiguous gpio range:
* GPIO Pin R0~R4 are gpio0~4
* GPIO Pin C0~C4 are gpio8~12
*/
gpiohog_exp_sel: exp-sel-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
line-name = "exp_sel";
output-low;
};
status = "disabled";
};
};
};
&lpspi3 {
status = "disabled";
clock-frequency = <1000000>;
pinctrl-0 = <&spi3_default>;
pinctrl-names = "default";
};
&gpio1{
status = "okay";
};
&gpio2{
status = "okay";
};
&gpio3{
status = "okay";
};
&gpio4{
status = "okay";
};