Chen Xingyu 3f7e73416d soc: riscv: privileged: efinix-sapphire: Enable CONFIG_RISCV_HAS_CPU_IDLE ... In an earlier commit, the riscv-privileged level implementation of `arch_cpu_idle()` is not included unless `CONFIG_RISCV_HAS_CPU_IDLE` is enabled. This commit ensures the option is enabled on all the existing CPUs, thereby maintaining the existing behavior. Signed-off-by: Chen Xingyu <hi@xingrz.me>		2023-11-28 15:34:06 +01:00
..
espressif_esp32	soc: esp32: call reset cause reason init	2023-11-27 19:59:45 +01:00
litex-vexriscv	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
openisa_rv32m1	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
riscv-ite	ITE: drivers/i2c: Add a property for I2C located channel	2023-11-08 10:08:28 +01:00
riscv-privileged	soc: riscv: privileged: efinix-sapphire: Enable CONFIG_RISCV_HAS_CPU_IDLE	2023-11-28 15:34:06 +01:00
CMakeLists.txt	…