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zephyr/soc/xtensa/intel_adsp
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Andy Ross c174ade4a1 arch/xtensa: Rework irq_offload: automatic config, SMP-safe 
The Xtensa implementation of arch_irq_offload() required that the user
select the correct interrupt manually, and would race with itself if
invoked from separate CPUs (it was saved here by the main
irq_offload() function which has a semaphore to serialize access).

Use the new gen_zsr.py script to automatically detect the highest
available software interrupt, and keep a per-CPU set of
callback/parameter pointers.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
 		2022-02-21 22:10:03 -05:00
..
cavs_v15 arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
cavs_v18 arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
cavs_v20 arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
cavs_v25 arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
common soc: xtensa: Replaced /dev/null in scripts 2022-02-03 07:59:55 -05:00
tools soc/intel_adsp: cavstool: poll FW_STATUS even when --log-only 2022-02-21 20:59:48 -05:00
CMakeLists.txt
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Kconfig soc/intel_adsp: Replace trace_out code with a sys_winstream 2022-01-13 14:01:23 -05:00
Kconfig.defconfig
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Kconfig.soc
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