zephyr/soc/intel
Kai Vehmanen 81977f2bff drivers: dma: intel_adsp_hda: fix intel_adsp_hda_unused() check
The ringbuffer availability check is subject to race with regards to
update of BF (Buffer Full) and BNE (Buffer Not Empty) bits in DGCS
register, and status of RP (Read Position) and WP (Write Position).

Following sequence is observed without this patch when
calling dma_get_status() on multiple Intel ADSP platforms:

iter 154 pending 1536 RP 768 WP 768, BNE 1, BF 1
-> dma_reload for 384
iter 155 pending 1536 RP 1152 WP 1152, BNE 1, BF 1
-> dma_reload for 384
iter 156 pending 0 RP 0 WP 0, BNE 1, BF 0

Value of pending is not expected to go from 1536 to zero if only 384
bytes have been consumed via dma_reload() since last call to
dma_get_status().

Change the logic to read DGCS register later, after the WP and RP have
been already read, and only check the BNE bit if Read and Write
Positions are equal.

Link: https://github.com/thesofproject/sof/issues/9418
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Co-developed-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2024-09-04 09:53:57 +02:00
..
alder_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
apollo_lake drivers/timer/apic_tsc: use ICR as a fallback timeout event source 2024-05-29 08:40:43 +02:00
atom
common soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
elkhart_lake
intel_adsp drivers: dma: intel_adsp_hda: fix intel_adsp_hda_unused() check 2024-09-04 09:53:57 +02:00
intel_ish soc: intel_ish: Make ISH support APIC timer with TSC time source. 2024-06-12 17:10:25 -05:00
intel_niosv arch: riscv: imply XIP config pushed to SoC level 2024-08-31 06:47:52 -04:00
intel_socfpga
intel_socfpga_std soc: intel_socfpga_std/cyclonev: enforce ARM_AARCH32_MMU 2024-07-05 18:39:53 +02:00
lakemont
raptor_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00