d27f6cb5eb
If IO APIC is in logical destination mode, local APICs compare their logical APIC ID defined in LDR (Logical Destination Register) with the destination code sent with the interrupt to determine whether or not to accept the incoming interrupt. This patch programs LDR in xAPIC mode to support IO APIC logical mode. The local APIC ID from local APIC ID register can't be used as the 'logical APIC ID' because LAPIC ID may not be consecutive numbers hence it makes it impossible for LDR to encode 8 IDs within 8 bits. This patch chooses 0 for BSP, and for APs, cpu_number which is the index to x86_cpuboot[], which ultimately assigned in z_smp_init[]. Signed-off-by: Zide Chen <zide.chen@intel.com> |
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| .. | ||
| exti_stm32.h | ||
| gic.h | ||
| ioapic.h | ||
| loapic.h | ||
| sam0_eic.h | ||
| sysapic.h | ||