zephyr/soc/nordic
Marcin Szymczyk ab79670fd6 soc: nordic: vpr: remove IRQ handling and enable RISCV_PRIVILEGED
IRQ handling functions are now in interrupt controller.
Enable necessary KConfigs to support CLIC properly.
A nice side effect of enabling RISCV_PRIVILIGED is that
`vector.S` is no longer necessary as common code handles
that.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-04-23 15:35:12 +02:00
..
common soc: nordic: vpr: remove IRQ handling and enable RISCV_PRIVILEGED 2024-04-23 15:35:12 +02:00
nrf51
nrf52
nrf53 arch: arm: cortex_m: Convert cpu_idle from ASM to C 2024-04-15 09:09:28 -07:00
nrf54h soc: nordic: nrf54h: make soc.h available to non-ARM CPUs 2024-04-19 02:23:16 +01:00
nrf54l soc: add nRF54L15 FLPR core support 2024-04-16 18:36:58 +01:00
nrf91
CMakeLists.txt soc: nordic: Fix undefined z_arm_platform_init 2024-04-19 16:55:13 +00:00
Kconfig
Kconfig.defconfig
Kconfig.soc
soc.yml soc: add nRF54L15 FLPR core support 2024-04-16 18:36:58 +01:00
timing.c
validate_base_addresses.c soc: add nRF54L15 FLPR core support 2024-04-16 18:36:58 +01:00
validate_enabled_instances.c
validate_rram_partitions.c soc: add nRF54L15 FLPR core support 2024-04-16 18:36:58 +01:00