zephyr/soc/riscv
Dino Li 2ecdd8fa89 ITE soc/it8xxx2/linker: add sections for hw sha256 calculation
IT8XXX2 HW support sha256 calculation, and its calculation is
faster than FW. We place SHA256 message, hash and key data
(total 512bytes) in RAM. If we enable hw sha256, because
HW limits, the sha256 data must place in first 4KB of RAM.
We add sections for hw sha256 calculation in linker.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-12-14 09:51:25 +01:00
..
esp32c3 xtensa: linker: Fix #52539 by updating the linker scripts 2022-12-08 18:46:59 +01:00
litex-vexriscv riscv: Introduce Zicsr and Zifencei extensions 2022-08-29 16:57:18 +02:00
openisa_rv32m1 intc: remove Kconfig.defconfig* setting of interrupt controller drivers 2022-09-01 10:25:36 +02:00
riscv-ite ITE soc/it8xxx2/linker: add sections for hw sha256 calculation 2022-12-14 09:51:25 +01:00
riscv-privilege soc: riscv: andes_v5: Fix system initialization for L2C 2022-11-29 09:50:05 +01:00
CMakeLists.txt