Jun Lin 82a887c98d driver: eSPI: npcx: support multiple bytes mode for Port80 ... eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single transaction. This allows the host to send max 32-bits Port80 code at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register to let the EC hardware put the full Port80 code to DP80BUF FIFO. It also groups the N-byte code into a single 32-bits variable when necessary by analyzing the offset field in the DP80BUF register. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>		2022-10-20 15:41:22 +02:00
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ecst	…
reg	driver: eSPI: npcx: support multiple bytes mode for Port80	2022-10-20 15:41:22 +02:00
CMakeLists.txt	…
pinctrl_soc.h	…
power.c	includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>	2022-09-05 16:31:47 +02:00
registers.c	driver: kscan: npcx: add driver support for kscan	2022-10-03 10:14:51 +02:00
scfg.c	…
soc_clock.h	…
soc_dt.h	…
soc_espi.h	…
soc_gpio.h	…
soc_host.h	…
soc_miwu.h	…
soc_pins.h	…
soc_power.h	…