39433f0669
Define all the register offset directly in the driver according to the RISCV PLIC specification as they are not configurable, see: https://github.com/riscv/riscv-plic-spec. Updated devicetrees that has PLIC accordingly. Signed-off-by: Yong Cong Sin <ycsin@meta.com> |
||
---|---|---|
.. | ||
sapphire_soc.dtsi |