Adds a missing menuconfig for the DSP library as well as fix an issue
with the zephyr library being a STATIC library and having no sources
in the case of the cmsis backend.
Signed-off-by: Yuval Peress <peress@google.com>
Cortex M0 support was previously disabled due to a compiler bug.
SDK 15.1 includes GCC 12.1 which solves this issue.
Fixes: #52788
Signed-off-by: Jon Escombe <jone@dresco.co.uk>
This commit properly writes back cached read pointer in spsc buffer
when freeing the memory.
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
This feature is not used in most tests, as there is no logic in C code that
utilizes `#ifdef TEST_x` statement.
The only test that does that is `tests/subsys/settings/fcb/` where `#ifdef
TEST_LONG` is used, so leave that test case untouched.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
-- Corrected PDU time stamps to match expected reference anchor point
-- Corrected failing test_rx_unframed_dbl_split according to expected
time stamps.
Signed-off-by: Nirosharn Amarasinghe <niag@demant.com>
Corrected an omission in the ISO-AL that required an SDU interval to
be added to the reconstructed RX time stamps for each SDU after the
first.
Signed-off-by: Nirosharn Amarasinghe <niag@demant.com>
NXP LPUART IP supports rs485 mode when transceiver driver enable
using RTS. Allow setting rs485 mode up via the "nxp,rs485-mode"
dts property. "nxp,rs485-de-active-low" dts property can be used
for set RTS polarity.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
Adds support for the Adafruit ItsyBitsy nRF52840 Express.
This board ships with the UF2 bootloader, so the device has
been set up so that Zephyr applications are flashed the
same way that other (Adafruit) firmware is flashed with the
UF2 bootloader.
This has been tested locally, and the button, blinky and
led_apa102 samples run without problems.
Signed-off-by: Embla Flatlandsmo <embla.flatlandsmo@gmail.com>
The different boards with stm32 which have node enabled in their DTS
also requires the HSI48 clock to be enabled.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The different boards with stm32 which have node enabled in their DTS
also requires the HSI48 clock to be enabled.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The different boards with stm32 which have node enabled in their DTS
also requires the HSI48 clock to be enabled.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The nucleo_wb55rg platform has Bluetooth feature that
requires the HSI48.
The board DTS enables the HSI48MHz clock for that purpose.
And also selects it as the source (default) of the CLK48.
Note that the clk48 node must be enabled for any another source.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the HSI48 clock to the stm32 devices that have this
clock signal.
Within a stm32 family, only few might have the
RCC_HSI48_SUPPORT.
STM32WB has a CLK48 mux.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The stm32 devices which have a HSI48 clock possibility.
for stm32F0, stm32G0, stm32G4, stm32H7, stm32L0,
stm32L4, stm32L5, stm32U5, stm32WB
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The HSI48 is enabled by clock control driver.
It is no more done by each driver that requires this clock
However when using rng or sdmmc or bluetooth/ipm or usb,
the HSI48 clock must be present in the DTS.
Add a warning for this particular check but keep the deprecated
HSI48 clock enable : keeping for legacy but to remove later.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 devices that have a HSI48 clock,
the driver enables it, like any other fixed clock,
if needed and supported by the serie.
For stm32L0, SYSCFG VREFINT is also required.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for get_config and get_direction functions
for the nct38xx IO expander family.
Also applies the clang-format changes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit fixes the comment and adds the missing assignment of
return value from i2c read byte command in the nct38xx driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Remove declarations of ZTEST() routines in header file, because there is
simply no value in having it.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Test summary can add a lot of noise to the logs when debugging
a specific test using `-test` argument.
Add control to turn this off.
Signed-off-by: Al Semjonovs <asemjonovs@google.com>
This commit removes illegal use of NET_BUF_FRAG in friend.c, which is an
internal flag.
Now `struct bt_mesh_friend_seg` keeps pointer to a first received
segment of a segmented message. The rest segments are added as fragments
using net_buf API. Friend Queue keeps only head of the fragments.
When one segment (currently head of fragments) is removed from Friend
Queue, the next segment is added to the queue. Head has always 2
references: one when allocated, another one when added as fragments
head.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
This patch reworks how fragments are handled in the net_buf
infrastructure.
In particular, it removes the union around the node and frags members in
the main net_buf structure. This is done so that both can be used at the
same time, at a cost of 4 bytes per net_buf instance.
This implies that the layout of net_buf instances changes whenever being
inserted into a queue (fifo or lifo) or a linked list (slist).
Until now, this is what happened when enqueueing a net_buf with frags in
a queue or linked list:
1.1 Before enqueueing:
+--------+ +--------+ +--------+
|#1 node|\ |#2 node|\ |#3 node|\
| | \ | | \ | | \
| frags |------| frags |------| frags |------NULL
+--------+ +--------+ +--------+
net_buf #1 has 2 fragments, net_bufs #2 and #3. Both the node and frags
pointers (they are the same, since they are unioned) point to the next
fragment.
1.2 After enqueueing:
+--------+ +--------+ +--------+ +--------+ +--------+
|q/slist |------|#1 node|------|#2 node|------|#3 node|------|q/slist |
|node | | *flag | / | *flag | / | | / |node |
| | | frags |/ | frags |/ | frags |/ | |
+--------+ +--------+ +--------+ +--------+ +--------+
When enqueing a net_buf (in this case #1) that contains fragments, the
current net_buf implementation actually enqueues all the fragments (in
this case #2 and #3) as actual queue/slist items, since node and frags
are one and the same in memory. This makes the enqueuing operation
expensive and it makes it impossible to atomically dequeue. The `*flag`
notation here means that the `flags` member has been set to
`NET_BUF_FRAGS` in order to be able to reconstruct the frags pointers
when dequeuing.
After this patch, the layout changes considerably:
2.1 Before enqueueing:
+--------+ +--------+ +--------+
|#1 node|--NULL |#2 node|--NULL |#3 node|--NULL
| | | | | |
| frags |-------| frags |-------| frags |------NULL
+--------+ +--------+ +--------+
This is very similar to 1.1, except that now node and frags are
different pointers, so node is just set to NULL.
2.2 After enqueueing:
+--------+ +--------+ +--------+
|q/slist |-------|#1 node|-------|q/slist |
|node | | | |node |
| | | frags | | |
+--------+ +--------+ +--------+
| +--------+ +--------+
| |#2 node|--NULL |#3 node|--NULL
| | | | |
+------------| frags |-------| frags |------NULL
+--------+ +--------+
When enqueuing net_buf #1, now we only enqueue that very item, instead
of enqueing the frags as well, since now node and frags are separate
pointers. This simplifies the operation and makes it atomic.
Resolves#52718.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Enable the openamp sample for RT1160EVK. CM4 core has a custom DTS
overlay to use LPUART2 for console information, and use a secondary GPT
timer for the system tick.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for loading M4 image from OCRAM when running with dual core
operation. The M7 core will copy the M4 image from flash into OCRAM, and
the M4 core will execute it there.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Flexspi partition definition is shared between both cm4 and cm7 core.
Refactor it to be in shared dtsi file. This will ensure that both cores
share the same partition information, for dual core operation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable the openamp sample for RT1170EVK. CM4 core has a custom DTS
overlay to use LPUART2 for console information, and use a secondary GPT
timer for the system tick.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for loading M4 image from OCRAM when running with dual core
operation. The M7 core will copy the M4 image from flash into OCRAM, and
the M4 core will execute it there.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Flexspi partition definition is shared between both cm4 and cm7 core.
Refactor it to be in shared dtsi file. This will ensure that both cores
share the same partition information, for dual core operation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add zephyr,memory-region compatible and attribute to SOC memory regions,
so that sections will be generated and MPU attributes can be applied.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use the messaging unit to ensure that the RT11xx dual core mode will
wait for the second core to boot successfully during early init
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT1170 and RT1160 CM7 and CM4 cores have the same set of differences.
Merge the DTS files for both CM4 and CM7 cores, to create generic
rt11xx_cm4 and rt11xx_cm7 files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT11xx features CM4 core, which must be booted from CM7 core. Add
support for loading an image for the CM4 to RAM, and booting the CM4 core
from this image. Each image is built independently using sysbuild, and the
M4 image build produces built collateral with load address information the
M7 image can use to load it to RAM
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow linking code into OCRAM region when building for RT1xxx SOCs. This
can be used on the RT11xx dual core SOCs as a shared memory region, when
the M7 core needs to load code into a region accessible to the M4 core.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
- Similar to what was done for other parts of the driver, remove any
register specification from Devicetree (modesel-reg/mask)
- Keep all the information in the driver, and define modes as "numbers",
e.g. PCA9420_MODE0: 0, PCA9420_MODE1: 1, etc.
- Bindings provide IC defaults now (all modes allowed 0/1/2/3 and
initial mode set to 0).
- When mode is controlled via the MODESEL0/1 pins (ie directly by an iMX
MCU using the dedicated PMIC_MODE0/1 pins), the driver will not allow
to select a mode (it is not possible). This mode is now enabled by
setting `nxp,enable-modesel-pins` in Devicetree. When enabled, all the
allowed modes are configured to be selectable via pins. When disabled,
mode can be set via I2C (using TOP_CNTL3 MODE0/1_I2C fields)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Maciej Zagrabski