Update eSPI buffer to values required per eSPI specification.
Allow applications to override as needed.
Guarantee buffers are not allocated at all if channels are
disabled.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This CL solves an interrupt storm caused by plenty of host access
messages when system is in S0. It only turns on the host access
interrupt before ec enters sleep and turns it off after leaving
sleep.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL prevents changing data content in the write function of host
interface by declaring it as constant pointer.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.
The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.
Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
power rails.
And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
time is greater or equal to 201 ms
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add ESPI SAF features to the Microchip eSPI driver as
a separate file. ESPI SAF depends upon the core eSPI
driver adding the ability to attach the system SPI
flash to the EC eSPI endpoint instead of the host
eSPI controller.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Keep OOB Rx channel and interrupt always enabled.
Send callback when packet is received in OOB Rx channel
if asynchronous host-initiated handling is enabled.
Note that driver doesn't perform any buffering from packets,
so access to OOB Rx channel is gated by client's driver
packet retrieval.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently assumption is all OOB traffic over eSPI bus is always client
initiated.
Add option for systems where host can initiate OOB traffic.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This CL added more additional details for KBC (Keyboard and Mouse
Controller) bus in espi_event structure. It helps the application to
handle different 8042 events in the callback function.
The format of event data for KBC 8042 protocol is:
[23:16] - 8042 event type: 1: Input buf full, 2: Output buf empty.
[15:8] - 8042 data: 8-bit 8042 data.
[0:7] - 8042 protocol type: 0: data type, 1: command type.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add an emulation controller which routes eSPI traffic to attached
emulators depending on the selected chip(mostly host).
This allows drivers for eSPI peripherals to be tested on systems
that don't have that peripheral attached, with the emulator handling
the eSPI traffic.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Replace marco function, defined(), with IS_ENABLED() in host sub-devices
driver implementation. In this PR, we won't replace the macros which
cause -Wimplicit-function-declaration warning if related configuration
is not enabled or its type is not boolean..
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL add a new notification event, ESPI_PERIPHERAL_EC_HOST_CMD, and
two response opcodes, ECUSTOM_HOST_CMD_GET_PARAM_MEMORY and
ECUSTOM_HOST_CMD_SEND_RESULT, to connect with host command sub-system
between host and ec.
It also introduced three configurations to increase the flexibility of
ec host command settings:
1. ESPI_PERIPHERAL_HOST_CMD_DATA_PORT_NUM:
Host I/O peripheral port number for ec host command data. The default
value is 0x0200.
2. ESPI_PERIPHERAL_HOST_CMD_PARAM_PORT_NUM:
Host I/O peripheral port number for ec host command parameters. The
default value is 0x0800.
3. ESPI_NPCX_PERIPHERAL_HOST_CMD_PARAM_SIZE:
Host I/O peripheral port size for ec host command in npcx series. The
valid value in npcx ec series for this option is
8/16/32/64/128/256/512/1024/2048/4096 bytes. The default value is 256
bytes.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces two kinds of op codes for espi_api_lpc_read_request
and espi_api_lpc_write_request Zephyr espi api functions.
One is for supporting ACPI and shared memory region to access ACPI data.
The other is customized for certain platforms such as Chromebook and so
on.
This CL also introduced the following configurations to add the
flexibility of these settings.
1. ESPI_PERIPHERAL_ACPI_SHM_REGION_PORT_NUM:
Host I/O peripheral port number for shared memory region. The default
value is default 0x0900
2. ESPI_NPCX_PERIPHERAL_ACPI_SHD_MEM_SIZE:
Host I/O peripheral port size for shared memory in npcx series.
Please notice the valid value in npcx ec series for this option is
8/16/32/64/128/256/512/1024/2048/4096 bytes. The default value is 256
bytes.
This CL also turn off hardware-wire feature which generates VW events
that connected to hardware signals such as SMI and SCI. We will set
VW output events directly via espi_api_send_vwire() api function.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Convert espi drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to prevent user turns on the pin-mux of devices has io-pads
unexpectedly, this CL added a new device definition for host uart
device. The pin-mux of host uart interface is enabled only if we set its
status as "okay" in dts file of board folder.
The following npcx7 drivers will meet:
1. Default status property of npcx devices with io-pads such as espi,
pwm, uart, host uart and so on should be "disabled".
2. Switch pin-mux by changing status property to "okay" in dts file of
board folder.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL replaces all DT_ prefix with NPCX_DT_ for all macros used
for providing npcx device information in soc_dt.h It avoided the
ambiguity with the DT_ prefix for system DT macros/defines.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When MEC15xx boots in MAFS, ROM bootloader performs activity over
eSPI flash channel prior to FW is loaded.
Need to clear STS_DONE during early eSPI driver initialization,
before enabling interrupts to avoid unexpected ISRs in FW.
Otherwise this would cause flash_lock semaphore to be incremented
due to ROM activity and result in FW's first espi flash request
to return immediately even before eSPI bus transaction completes.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This CL fixed the wrong comparison during searching the vw signal
that issued interrupt from MIWU in espi_vw_generic_isr().
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL adds more comments for each macro functions used for device tree
file for better explanations. It also changes all hex values in soc.c to
lower case.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL contains the drivers of NPCX Host Sub-Modules that serve as an
interface between the Host and Core domains. For most of them, the Host
can configure these modules via eSPI(Peripheral Channel)/LPC by
accessing 'Configuration and Control register Set' which IO base address
is 0x4E as default. And the interrupts in core domain help handling any
events from host side.
In this commit, we introduced six host sub-modules. It includes:
1. Keyboard and Mouse Controller (KBC) interface.
2. Power Management (PM) channels.
3. Shared Memory mechanism (SHM).
4. Core Access to Host Modules (C2H).
5. Mobile System Wake-Up functions (MSWC).
6. Serial Port (Legacy UART)
The tasks in application layer such as 8042, ACPI and host command can
cooperation with this driver by connecting api or callback functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Fixed build error in in eSPI socketpair test suite since wrong function
name for eSPI flash channel api.
This CL also fixed [-Werror=unused-function] warning by adding inline
attribute in case someone includes "espi_utils.h" and doesn't call
espi_manage_callback() function.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add Kconfig switch to disable automatic eSPI slave boot acknowledge.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.
Required for eSPI SAF boot configuration.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Fix incorrect register update that results in unintentionally
in default eSPI frequency (20MHz) whenver IO mode is changed.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
eSPI slave driver should only indicate that a channel is ready
after the eSPI master has enabled said channel.
However, this indication is incorrectly sent during eSPI reset
even before channel renegotiation starts.
Perform only channel-specific interrupts enabling inside
initialization functions.
Send Channel ready ack only after channel negotiation is received.
Add missing callbacks for channel events to notify client driver.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This enables the ACPI_EC1 interface which is typically accessed
through ports 0x6A0 and 0x6A4 in Bios.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Espi has three uart port from 0 to 2 and uart sirq need to enabled for
the port which is active in the hardware. An active uart sirq shoudl be
enabled based on uart mapping configuration.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
MCHP Soc operation uses clear-on-write register for interrupt
status, read-OR-write operation may clear interrupts unintentional.
Fixes#24464
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Espi bus interrupts need to re-enable after espi reset to get
all espi bus and vw signal interrupts.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
Epsi slave need to respond with an OOB_RST_ACK for OOB_RST_WARN sent by
master during host reset. Enable interrupt for OOB_RST_WARN to receive
signal changes and respond with ACK.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
Several functions that are syscalls were passing structs by value
instead of by reference. Just changed that and implemented missing
verfication handlers for them.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add verification handlers for some syscalls that are just missing
that. Though there are syscalls still missing that but they need to be
fixed before adding verification handlers.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Jose Alberto Meza