UART IP is clocked with 50MHz on HAPS by default. So switch
UART clock-frequency from 100MHz to 50MHz for nsim_* boards
so the binaries can be run on HAPS as well.
This property is dummy in case run in simulator (nSIM) so we
don't need to change anything in nSIM configuration files.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Improve the way the nrf_qspi_nor driver configures the SCK frequency,
to properly support QSPI also on nRF53 Series SoCs that use a different
base clock frequency (96 MHz).
Add also a relevant configuration in the spi_flash sample so that it
can run on the nRF5340 DK.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fixes: #29074
This reverts commit fc8f639b9a.
The suggestion provided in #27901 is impacting processing order of
overlay files in a non-logical way, see #29074 discussion for details.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Update the board image file in the nrf5340 documentation,
reflecting the fact that we now document the nRF5340 DK
instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Update the docs of nRF5340 board, to point to the
nRF5340 DK instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add back Doxygen documentation that previously existed in sys/util.h
and was moved to sys/util_macro.h.
Also fixes#29896
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
deprecate DEVICE_INIT in favor of just using DEVICE_DEFINE directly.
The small handful of DEVICE_INIT users was easily converted to use
DEVICE_DEFINE or SYS_DEVICE_DEFINE.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a step towards phasing out DEVICE_INIT and just having
DEVICE_DEFINE. To make it a little easier on users or DEVICE_DEFINE
if they don't care about PM, they can just pass NULL for the
pm_control_fn paramater.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Put infrastructure for the following HCI commands/events in place:
* LE Set CIG Parameters command
* LE Remove CIG command
* LE Create CIS command
* LE Accept CIS Request command
* LE Reject CIS Request command
* LE CIS Established event
* LE CIS Request event
Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
Currently, the Zephyr LwM2M code base is littered with hard-coded
object- and resource IDs, such as
/* Mark 1st instance of security object as a bootstrap server */
lwm2m_engine_set_u8("0/0/1", 1);
The purpose of this LoC is extremely opaque without the accompanying
comment. Each use of a resource path requires constantly checking
headers or the object registry to ensure you're not misremembering IDs.
To alleviate this, this commit introduces a variadic LwM2M path
expansion macro which performs preprocessor stringification on each
argument. For instance, "0/0/1" can now be written as
LWM2M_PATH(LWM2M_OBJECT_SECURITY_ID, 0, SECURITY_BOOTSTRAP_FLAG_ID)
which, while albeit lengthier, avoids the use of hard-coded string
literals, thus making the code much more immediately understandable.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Update the `peripheral` and `peripheral_ht` samples to use the
indication `destroy` callback to determine when the indication has
completed, instead of using the value callback of the first active
connection.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds a `destroy` callback to the `struct bt_gatt_indicate_params` which
is used to signify to the application that the indication operation has
completed and the struct instance can be freed/destroyed.
This is required as the number of indication value callbacks that will
be triggered is not known by the caller when the `conn` parameter is
`NULL`.
Tracking when this callback should be run is mananged by a private
reference counter inside the struct.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Update the signature of the `bt_gatt_indicate_func_t` callback type by
replacing the attr pointer with a pointer to the
`bt_gatt_indicate_params` struct that was used to start the indication.
This allows the callback to free the `bt_gatt_indicate_params` instance
if it was allocated from storage, while still allowing the
`bt_gatt_attr` value to be accessed through `params->attr`.
Allocating the `bt_gatt_indicate_params` instance from storage is
desirable as multiple indications can be queued, however each instance
must be valid until the callback is run.
Implements API update from #29357
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some platforms may have multiple RAM regions which are
dis-continuous in the physical memory map. We really want
these to be in a continuous virtual region, and we need to
stop assuming that there is just one SRAM region that is
identity-mapped.
We no longer use CONFIG_SRAM_BASE_ADDRESS and CONFIG_SRAM_SIZE
as the bounds of kernel RAM, and no longer assume in the core
kernel that these are identity mapped at boot.
Two new Kconfigs, CONFIG_KERNEL_VM_BASE and
CONFIG_KERNEL_RAM_SIZE now indicate the bounds of this region
in virtual memory.
We are currently only memory-mapping physical device driver
MMIO regions so we do not need virtual-to-physical calculations
to re-map RAM yet. When the time comes an architecture interface
will be defined for this.
Platforms which just have one RAM region may continue to
identity-map it.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This change enables support for DNS service discovery
(RFC 6763) in the mdns_responder service and sample app.
Fixes#29429
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
This change adds support for DNS Service Discovery (DNS-SD)
as described in RFC 6763.
Fixes#29099
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
This change adds net_context_port_in_use(), which is a simple
wrapper around net_context_check_port() and is used to check
if a particular socket is bound to a given IP address.
Fixes#29649
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
When MEC15xx boots in MAFS, ROM bootloader performs activity over
eSPI flash channel prior to FW is loaded.
Need to clear STS_DONE during early eSPI driver initialization,
before enabling interrupts to avoid unexpected ISRs in FW.
Otherwise this would cause flash_lock semaphore to be incremented
due to ROM activity and result in FW's first espi flash request
to return immediately even before eSPI bus transaction completes.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
To make it runnable in the sanitycheck necessary to add
capture output, because that sample runs infinite period of time
and can not finished by itself. To avoid timeout error
in the sanitycheck I added capture output for a several times.
Also added one more tag to describe that it is a power
management sample.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The Inter-core Debug Unit provides additional debug assist features in
multi-core scenarios.This commit allows ARConnect to conditionally
halt cores during debugging.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
In current implementation, for Ping command, write data/payload is
queued in FIFO infinitely eventhough Ping command have write length
of '0'.
This issue is addressed in this patch.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
The compiler doesn't need help here.
For example, gcc creates this on Aarch64:
_ldiv5:
ldr x1, [x0]
mov x2, -3689348814741910324
movk x2, 0xcccd, lsl 0
add x1, x1, 2
umulh x1, x1, x2
lsr x1, x1, 2
str x1, [x0]
ret
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Execute tests are disabled for RISC-V because is isn't able
to set an execution restriction. From RISC-V documentation:
"Instruction address-translation and protection are unaffected
by the setting of MPRV"
MPRV is used to apply memory protection restriction when CPU is
running in machine mode (kernel).
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Add a memory region allocation for RISCV architecture.
Also fix an arbitraty value which can't work with
RISC-V granularity.
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Add support for the following tests:
- test_write_control
- test_disable_mmu_mpu
- test_read_priv_stack
- test_write_priv_stack
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
The goal of this sample application is to measure the performance loss
when a user thread has to go through a system call compared to a
supervisor thread that calls the function directly.
Signed-off-by: Nicolas Royer <nroyer@baylibre.com>
- Move kobject list after .bss
The previous order shift kernel object address defined in prebuild
file (which is use as reference in running time). So it was impossible
for zephyr to check if a kernel object address was granted because
address changed during build.
- Add support for memory shared.
- Move sdata2 section in ROM because it contains constants.
Signed-off-by: Nicolas Royer <nroyer@baylibre.com>
The IRQ handler has had a major changes to manage syscall, reschedule
and interrupt from user thread and stack guard.
Add userspace support:
- Use a global variable to know if the current execution is user or
machine. The location of this variable is read only for all user
thread and read/write for kernel thread.
- Memory shared is supported.
- Use dynamic allocation to optimize PMP slot usage. If the area size
is a power of 2, only one PMP slot is used, else 2 are used.
Add stack guard support:
- Use MPRV bit to force PMP rules to machine mode execution.
- IRQ stack have a locked stack guard to avoid re-write PMP
configuration registers for each interruption and then win some
cycle.
- The IRQ stack is used as "temporary" stack at the beginning of IRQ
handler to save current ESF. That avoid to trigger write fault on
thread stack during store ESF which that call IRQ handler to
infinity.
- A stack guard is also setup for privileged stack of a user thread.
Thread:
- A PMP setup is specific to each thread. PMP setup are saved in each
thread structure to improve reschedule performance.
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
- Set some helper function to write/clear/print PMP config registers.
- Add support for different PMP slot size function to core/board.
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Introducing core E31 family to link Zephyr features (userspace and
stack protection) to architecture capabilities (PMP).
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Move the data/command GPIO from Arduino header 16 (D10), which collides
with Arduino SPI SS, to Arduino header 15 (D9).
Add commented example for specifying a reset GPIO on Arduino header 14
(D8).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We deprecate nRF5340 PDK and add a note that
the board will be replaced by nRF5340 DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Nordic Dev Kit board names were changed in Zephyr
v2.3 release, following the standard Board deprecation
policy. Two releases later we do not need to keep
references to the old names in the boards' documentation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The zeth interface was left hanging around when the test
finished but we can remove it here as it is not needed.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Henrik Brix Andersen