Improve initialization of the ADC.
After initialization with the default values, the clock source
of the ADC is asynchronous clock (ADACK) and clock divide ratio
is 8. The minimum conversion clock frequency is 1MHz.
Add clock divider selection and set default divide ratio to 1.
That sets the conversion clock frequency to approximately 5MHz.
Default configuration for the voltage reference is set to
external pins V_REFH and V_REFL. Depending on the MCU configuration
V_REFL may be connected to ground and V_REFH to VREF_OUT.
Since Voltage Reference block is not supported, the ADC does not work
properly on FRDM-KW41Z. Add voltage reference selection to fix it.
Enable self-calibration function as recommeded in Reference Manual.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
SoCs outside the Kinetis family can have the ADC16 module, so move the
HAS_ADC16 config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Johann Fischer