OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity

drivers: adc_mcux: improve initialization of the ADC 

Improve initialization of the ADC.

After initialization with the default values, the clock source
of the ADC is asynchronous clock (ADACK) and clock divide ratio
is 8. The minimum conversion clock frequency is 1MHz.
Add clock divider selection and set default divide ratio to 1.
That sets the conversion clock frequency to approximately 5MHz.

Default configuration for the voltage reference is set to
external pins V_REFH and V_REFL. Depending on the MCU configuration
V_REFL may be connected to ground and V_REFH to VREF_OUT.
Since Voltage Reference block is not supported, the ADC does not work
properly on FRDM-KW41Z. Add voltage reference selection to fix it.

Enable self-calibration function as recommeded in Reference Manual.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit is contained in:
Johann Fischer 2018-09-28 14:18:03 +02:00 committed by Maureen Helm
parent 487603e655
commit 0187d60937
2 changed files with 56 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/adc/Kconfig.mcux
View File

@ -11,3 +11,37 @@ config ADC_MCUX_ADC16
depends on HAS_MCUX_ADC16
help
Enable the MCUX ADC16 driver.
if ADC_MCUX_ADC16
choice
prompt "Clock Divide Selection"
default ADC_MCUX_ADC16_CLK_DIV_RATIO_1
config ADC_MCUX_ADC16_CLK_DIV_RATIO_1
bool "Divide ratio is 1"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_2
bool "Divide ratio is 2"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_4
bool "Divide ratio is 4"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_8
bool "Divide ratio is 8"
endchoice
choice
prompt "Voltage Reference Selection"
default ADC_MCUX_ADC16_VREF_DEFAULT
config ADC_MCUX_ADC16_VREF_DEFAULT
bool "Default voltage reference pair V_REFH and V_REFL"
config ADC_MCUX_ADC16_VREF_ALTERNATE
bool "Alternate reference pair"
endchoice
endif # ADC_MCUX_ADC16

22
drivers/adc/adc_mcux_adc16.c
View File

@ -199,7 +199,29 @@ static int mcux_adc16_init(struct device *dev)
adc16_config_t adc_config;
ADC16_GetDefaultConfig(&adc_config);
#if CONFIG_ADC_MCUX_ADC16_VREF_DEFAULT
adc_config.referenceVoltageSource = kADC16_ReferenceVoltageSourceVref;
#else /* CONFIG_ADC_MCUX_ADC16_VREF_ALTERNATE */
adc_config.referenceVoltageSource = kADC16_ReferenceVoltageSourceValt;
#endif
#if CONFIG_ADC_MCUX_ADC16_CLK_DIV_RATIO_1
adc_config.clockDivider = kADC16_ClockDivider1;
#elif CONFIG_ADC_MCUX_ADC16_CLK_DIV_RATIO_2
adc_config.clockDivider = kADC16_ClockDivider2;
#elif CONFIG_ADC_MCUX_ADC16_CLK_DIV_RATIO_4
adc_config.clockDivider = kADC16_ClockDivider4;
#else /* CONFIG_ADC_MCUX_ADC16_CLK_DIV_RATIO_8 */
adc_config.clockDivider = kADC16_ClockDivider8;
#endif
ADC16_Init(base, &adc_config);
#if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && \
FSL_FEATURE_ADC16_HAS_CALIBRATION
ADC16_SetHardwareAverage(base, kADC16_HardwareAverageCount32);
ADC16_DoAutoCalibration(base);
#endif
ADC16_EnableHardwareTrigger(base, false);