Commit Graph

617 Commits

Author SHA1 Message Date
Dan Kalowsky 14b5d5c79d quark_se : pinmux : fixing the naming convention
Naming convention should follow the IP_noun_verb concept.  In this case,
renaming several functions from (for example) pinmux_set_pin to
pinmux_pin_set, while also correctly naming the function to their
specific tasks.

This is being done to make way for the ability to change the input
value, pullup value, and the slew as well.

Change-Id: Iec6f1723a48f80b66f3cea44df9bb6925972f6af
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:25:10 -05:00
Dan Kalowsky e46d5c6229 pinmux: adding pullup and input enable functions
Extending the public interface of the pinmux to allow the end user
to set a pin as an input/output and to pull up the value on
a specified pin.

Change-Id: Ie0a3b6432dd8c7d7a02f32e3d22049bdd99f1410
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:10 -05:00
Anas Nashif 33ce2c7011 quark_se: quark_d2000: do not set native drivers as default
Allow usage of alternative drivers and do not hardcode drivers
to zephyr own implementation.

Change-Id: Ieb55b5dc88b3643f276b7c48facef7f1c1c42fa7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:06 -05:00
Anas Nashif 8704792c45 grove_lcd: this display is not a feature of the board
The LCD display is an add-on, not a feature of the platform or the
board.
Set the defaults and remove the definition from Galileo Kconfig.

Change-Id: Ic319cd765d2dc1fe08cc65615680821fe9bc6a83
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:06 -05:00
David Antler a99b90e4da Fixed Galileo UART0_RXD muxing bug
The pin mux for Galileo Gen2 isn't set properly to enable UART0_RXD input from
the Arduino headers. EXP1's pin0 OE_N needs to be set HIGH to make the IO0
buffer an Input.

Change-Id: I0167f11ff5ee87bd5afe17300807b1aa4ed17abf
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: David Antler <david.a.antler@intel.com>
2016-02-05 20:25:06 -05:00
Andrew Boie 689ec02211 x86: mvic: fix IDT reload
The argument to 'lidt' is a chunk of memory with the base address
and limit of the IDT, and not the IDT itself. Horrible things
were happening when the IDT itself was being passed to this
instruction.

To be extra safe, disable interrupts while we modify the table
and subsequently reload it.

Change-Id: I9bf96f13a5f6e1be80d11bbfb9db3df1f2ed613a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:06 -05:00
Dirk Brandewie d8a1c8ef17 x86: iamcu: Add support for the IAMCU calling convention.
Add support for compilers conforming to the IAMCU calling convention
as documented by
https://github.com/hjl-tools/x86-psABI/wiki/iamcu-psABI-0.7.pdf


Change-Id: I6fd9d5bede0538b2049772e3850a5940c5dd911e
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:06 -05:00
Andrew Boie a664aae335 x86: reduce static IRQ stub size
All of these stubs at the end pop the stack and tell the LOAPIC
that we are at EOI. Put this in common code which falls through to
_IntExit(). Saves 8 bytes per static IRQ stub. There is also small
constant savings in the common code for dynamic IRQs.

Change-Id: If17e9f105928a4251a2cb3fc0d192649c1c4d84b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:05 -05:00
Andrew Boie 88808f1247 quark_se: apic: work around EOI forwarding issue
Quark SE Lakemont core has a hardware bug where the LOAPIC does
not properly notify the IOAPIC to clear the IRR bit for level-
triggered interrupts.

This patch introduces a workaround where the vector ID of the
in-service interrupt is manually written to the IOAPIC_EOI
register, resulting in the bit being cleared.

Unfortunately, in the context where EOI happens it's very difficult
to identify which IRQ line is being serviced, so this is done
unconditionally for all interrupts vectors whether they are registered
in the IOAPIC RTE table or not.

Change-Id: I639cd258dec4f50934e17eadbb821e6a7112e636
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:05 -05:00
Daniel Leung 9e9922265e serial: simplify interrupt config options
Instead of having two config options to specify interrupt triggering
conditions, merge them into one option and clarify. This is now
similar to other drivers which have interrupt triggers.

Change-Id: I4e60c8c45a08d005dcc8256cb89e4c5be7c94307
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:05 -05:00
Daniel Leung c71dddb2c2 spi: dw: intel: move IOAPIC interrupt trigger flags into driver
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.

Change-Id: I89090181acb5f48dd797e7773ab65c5f3d46c42a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:05 -05:00
Daniel Leung 8effb4fed3 shared_irq: move IOAPIC interrupt trigger flags into driver
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.

Change-Id: Ie7262b69226ebffa7e1b9e35725fda24b3fe089f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:04 -05:00
Daniel Leung 66b99d9cc1 i2c/dw: move IOAPIC interrupt trigger flags into driver
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.

Change-Id: I2d50457a45fae62ff085f7239712d580243253bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:04 -05:00
Daniel Leung 8cb01064f6 gpio/dw: move IOAPIC interrupt trigger flags into driver
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.

Change-Id: Ia0a069464392714f38037841de52e8d265fa4f49
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie 407d9e050b x86: irq_offload: don't use the last vector
The APIC by default uses vector 0xFF for the spurious interrupt
vector as described in the x86 CPU manual volume 3 section 10.9.
Make this its own config option defaulting to 32.

MVIC doesn't have a spurious interrupt vector, and due to the
fixed IRQ-to-vector mapping for this controller, continue
to use the last available entry.

Change-Id: I29bd09df700629dc0d15b30a6ae590b0df1ef890
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie a0e427f8a4 x86: remove loapic_int_vec_trigger()
This was only needed for an older implementation of software interrupts,
now superseded by the irq_offload() API (which doesn't interact with
the interrupt controller at all)

Change-Id: I8aa696d370ae1799872f6d70de69f3cb5b47456a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie 3589695508 ipi: rename to ipm
To many people, IPI connotes inter-processor interrupts on SMP
systems. Rename this to IPM, or Inter-Processor Mailboxes.

Change-Id: I032815e23c69a8297c0a43992132441c240fb71e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Anas Nashif 487660def2 quark_se: shared_mem.h is local to the file including it
Change-Id: I7071dbb6e43a04a48aaff7462e5e5dd395c7b137
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:04 -05:00
Anas Nashif 938d8958a5 remove stray defconfig left behind during rebase
This one exists in configs/ now.

Change-Id: I7b75f16a837e58dbfaa2c2e3cf3666a89f4b0e26
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:04 -05:00
Anas Nashif 66233116ff kconfig: define CONFIG_PLATFORM only once
define CONFIG_PLATFORM only once in arch/Kconfig and set it
for every platform.

Change-Id: I8554bb36d2d15c3ee71fa63dfc3a763ebca956ee
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:04 -05:00
Dirk Brandewie fa2441534a x86: kernel move excstub.S back to core
excecptions are handled the same for i386_sysV_abi and iamcu calling
conventions ATM since we do not have any exceptions that we can
recover from there is no reason to have seperate implementations.

Change-Id: Ica8b332d7756a91b56f7080ac74771ad25d32753
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:04 -05:00
Dirk Brandewie 88ce5bc8f5 kernel: remove CONFIG_INT_LATENCY_BENCHMARK fences from code path
Add null definitions for the interrupt latency measurement API so we
can remove compile fences in C code.

Change-Id: If86eedf79afcb49002108814dd4fb864956eb667
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie a50f923504 x86: fatal: report vector number of spurious interrupts
Change-Id: I79de1a77d2b5f87aa3bd1a7aebd0253dbb069252
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie 65c16621a1 kernel_event_logger: fix function defintion
functions defined in header files needs to be 'static inline' to
avoid linker issues if they are used more than once.

Change-Id: I2feb3560bde7cbc9a5c7932eca585be8036f3b25
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie 902eb1d5f1 loapic: expose _loapic_isr_vector_get() in header
Other internal functions are shown in this header, no reason to
keep this a secret.

Change-Id: Icb7d36206148c281f1960d1ac10368d9bb3033f1
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:03 -05:00
Andrew Boie 7770c3ed9d x86: mvic: re-load IDT if it is modified
According to the datasheet, there is some caching going on as a 
performance optimization and the IDT needs to be re-loaded if any
changes are made at runtime.

Change-Id: I23864e1109907512066a9f8f3a36e3f719b9174b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung 77d167d004 ioapic: move common init code into driver
The initialization code and macros are the same. So extracts it
and puts it into the driver. This is another step to follow
the driver model.

Those empty C files are there because the current Kbuild
requires Makefile to be present at those directories,
(due to arch/x86/Kbuild), which requires building some object
files. So the empty source files are there to produce empty
object files to satisfy this.

Change-Id: I14056347ea14cff227d9e8960192e8673c0019b8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung 921ee03094 loapic: move common init code into driver
The initialization code and macros are the same. So extracts it
and puts it into the driver. This is another step to follow
the driver model.

Change-Id: I1d379068f64855d5d4595838040ec50f97f638a0
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung 8778152298 i8259: move init code into driver
The initialization code and macros are the same. So extracts it
and puts it into the driver. This is another step to follow
the driver model.

Change-Id: I1af8b2888779b2b58367feaff9ee1a6d97b4873c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung a6f195937e x86/qemu_x86: remove empty init function
There is no need to do empty initialization.

Change-Id: Ic6a4a26e61901b345ccd638af550ca1352dd7b43
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung 4331244352 x86/ia32: remove empty init function
There is no need to do empty initialization.

Change-Id: Ic3067d519486ee0ce31ba5937f9fc2c49401058e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:25:03 -05:00
Daniel Leung 6354e36be7 aio: dw: fix compilation errors
() Fix compilation errors due to variable ordering.
() Fix the default config for Quark/SE SS as
   the kconfig options were renamed in previous
   patches.

Change-Id: I1004ae332fb857b60ed90df59831e7bd9c490cb8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:58 -05:00
Benjamin Walsh 3181df6db4 kernel: add per-thread errno support
Saves an errno per-thread, retrieved via _get_errno(), instead of
changing the value of a global variable during context switches to avoid
a hit to the context switch performance.

Per-arch asm implementations are provided for maximum performance.

Enabled by default, but can be disabled via the CONFIG_ERRNO option.

Change-Id: I81d57a2e318c94c68eee913ae0d4ca3a3609c7a4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:58 -05:00
Daniel Leung 3c9592ec59 quark_se: need some extra love for interrupt driver UARTs
() The SCSS has some additional registers to mask interrupts
   from peripherals. This patch unmasks the interrupts for
   the two UARTs on board, so that interrupts can be delivered.
() The UART interrupts are edge-triggerd, so set the config
   options accordingly.

Change-Id: I39a1edccd830a8a19288982efa2e9d0faaaff8ba
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka 04f5cfb889 wdt: dw: Add support for optional clock gating
Clock gating is platform specific and not mandatory. Thus making it
Kconfig based as well as generic.

Change-Id: I4ea10eadb077ac3d57c9337b43b1a9fb14763302
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka 61c15ba1e1 rtc: dw: Add support for optional clock gating
Clock gating is platform specific and not mandatory. Thus making in
Kconfig based as well as generic.

Change-Id: I01b7831536efd87cc66a95060fcf1faf4a340073
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka d1d66a6200 rtc: dw: Unmasking interrupt is not generic among platforms
Let's apply the interruption unmasking if only the mask is defined.
Which definition should be done in board.h thus applying the change to
quark_se and quark_d2000 platforms

Change-Id: I9c273e2e7e33dd077a54e8f9205fa949a5e3707a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka 49a6e0ae37 wdt: dw: Unmasking interrupt is not generic among platforms
Let's apply the interruption unmasking if only the mask is defined.
Which definition should be done in board.h thus applying the change to
quark_se and quark_d2000 platforms

Change-Id: Ie0a4912f0dfbd97f2273efed963f7810a985c0bd
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka 66f05ce4b3 rtc: dw: Make internal primitives Kconfig based
Base address, IRQ, interrupt priority as well as the instance name: all
are now Kconfig based. Thus Applying the change to quark_se and
quark_d2000 platforms. Sample code is updated as well.

Change-Id: I1c225c1b68d94b22ca10423b50a78a0ba09a27a5
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Tomasz Bursztyka 85b49efe67 watchdog: dw: Make internal primitives Kconfig based
Base address, IRQ, interrupt priority as well as the instance name: all
are now Kconfig based. Thus Applying the change to quark_se and
quark_d2000 platforms. Sample code is updated as well.

Change-Id: Idcc89e6e9f4acc337fafc7d42f8de3061a5ece04
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:58 -05:00
Anas Nashif 275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Yonattan Louise 8885d093c4 Add support for profiling sleep events in nanokernel.
This patch remove the dependency of the ADVANCE_POWER_MANAGEMENT
for profiling sleep events that was supported only for microkernel.
Allowing us to also use this feature in nanokernel-only systems.

Change-Id: I1761eb6c4d72f477b419dfca5dc152b0fb69ee27
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
2016-02-05 20:24:58 -05:00
Anas Nashif 036f793544 quark_se: change interrupt values for UART
The values for this platform were wrong.

Change-Id: Iaa24ae05b29b7af26437f0be8fe88e6eab12469d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:57 -05:00
Anas Nashif 8ff397d005 qemu_x86: remove obsolete UART defines
Those are now defined using Kconfig

Change-Id: Ie3518f8865968902f8400d209d1b6c38dfb7eca7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:57 -05:00
Anas Nashif 0f0d8d2c2f quark_se: set UART IRQ flags
Set correct interrupt flags which are used with the console
handler.

Change-Id: I6a3a76826cedd0b4116f622701f2cb1161dd8adc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:57 -05:00
Anas Nashif e6f5702e5f quark_d2000: set UART IRQ flags
Set correct interrupt flags which are used with the console
handler.

Change-Id: I473a1fca6234ffb8d926457e8ccecfa29d1be6a5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:57 -05:00
Anas Nashif 40e41a968d quark_d2000: change interrupt values for UART
Set correct interrupt values for this platform.

Change-Id: I97361b4420630e73bb8c8f812c943ee972cb8762
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:57 -05:00
Juan Manuel Cruz bc1a79c4c3 irq: removes priority parameter from IRQ_CONFIG macro
Removes the 'priority' parameter from the IRQ_CONFIG macro.
This parameter was not used anymore in any architecture.
The priority is handled in the IRQ_CONNECT macro.
The documentation is updated as well.

Change-Id: I24a293c5e41bd729d5e759113e0c4a8a6a61e0dd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:57 -05:00
Andrew Boie 4d7181b762 x86: move intconnect.c
Although it contains functions called from ASM-land, there's no
calling-convention specific code here.

Change-Id: I3d912bdf28e6f3e797e6a2d6b745302b4c884b4a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:57 -05:00
Daniel Leung ddab92c23a hpet: move content of include/drivers/hpet.h into driver
The content of include/drivers/hpet.h is really private to
the driver and does not need to be exposed in public include
directory. So move the content into driver code.

Change-Id: Ica442e43c480a6b079b8d3c4e75e67adcfd0ba6b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:56 -05:00
Sergio Rodriguez 2e2ad8166e qemu: Creation of QEMU specific platforms
Setting up new platforms to handle emulation, and make them the only
ones able to run on QEMU from the Makefile "qemu" target to avoid
confusion with other platforms. We have now platform qemu_x86 and
platform qemu_cortex_m3, also modification to the sanity checks to have
qemu support only on those platforms

Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Change-Id: I9291918a1d58fea4f37750ada78234628f9a5d98
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung ba6f2d9617 uart: remove uart_devs[]
Since all the necessary bits utilizing UART by index have moved to
use device name instead, the uart_devs[] can finally be removed.

Change-Id: Idbae6b46c0af9eef6c22c59e121e9d6a6b52426a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 5cdd4584fe uart_pipe: use device name instead of index
Use device name to find the UART device for uart_pipe usage,
instead of relying on an arbitrary index.

Change-Id: I36aaa4ed8f0b4905e4e741ca1464947e59f30869
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 1720991b81 bluetooth/uart: use device name instead of index
Use device name to find the UART device for Bluetooth usage,
instead of relying on an arbitrary index.

The default device names being used are derived from the original
board.h for each platform. Some of them point to the same device
as UART console. Since this is a Kconfig option, the default
can be overridden so this is not a serious issue.

Change-Id: Ibe82f3968e72ba60f9c033aa3dfcb2fb3c41dc75
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 08b4fd431b console/uart: use device name instead of index
Use device name to find the UART device for console usage, instead of
relying on an arbitrary index.

Change-Id: Iebe01c9bf392dfee6d8284367f67647f7d47561a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 5faca5067a uart_pipe: let UART driver do the initialization
Remove the call to uart_init(), and let the UART drivers take care of
the port initialization.

Change-Id: Id3e46135ab993cb6596b1fb5339ab1664c65ab40
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 3d361603e5 bluetooth/uart: let UART driver do the initialization
Remove the call to uart_init(), and let the UART drivers take care of
the port initialization.

Change-Id: Ibeca65b3fe64feb7a203a793c01c525ff5e6afda
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 728d91d598 serial/ns16550: refactor (again) to conform to driver model
() Renames ns16550.c to uart_ns16550.c. This is to follow
   the driver naming convention.
() Renames functions ns16550_uart_*() to uart_ns16550_*(),
   following driver naming convention.
() UART ports initialization is moved into the driver itself.
   All the init code in platform config files is removed.
() Adds (many) Kconfig options. These don't have to be defined
   in each platform's board.h anymore.
() Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_*
() Disable NS16550 for ARC as no port is defined anyway.

Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Andrew Boie d95b958cfa quark_d2000: correctly configure timer interrupt
The IRQ line used for MVIC timer interrupts is 0, not 10.

Change-Id: I076bf9c8902e7384e493945e6689fcbefff59cad
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:56 -05:00
Tomasz Bursztyka 8e4aff1079 gpio: dw: Support optional clock gating
This is currently valid for quark_se platform. It's used internally to
suspend and/or resume the gpio controller.

Change-Id: I5147568ba6b0450363566b5f9fd2e8aa7e41df49
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:55 -05:00
Anas Nashif 61d7f11f0f gpio: dw: Support host interrupt mask on Quark SE
Change-Id: Ie58e8611a8fe9edec9ebcb123532a97f396098f4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:55 -05:00
Tomasz Bursztyka 6351d6671d quark_se: Exposing only one gpio controller and fixing his bits
There is no secondary GPIO controller on such SoC. Plus, the unique
controller controls at least 28 pins (if not 32, so I set 32), as
verified on boards.

Change-Id: I61c563671a908551250faa2a0fb9f9e2e17018d3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:55 -05:00
Anas Nashif 62ca32d692 kconfig: reorganise kconfig for x86
Group options and remove redundant menus.

Change-Id: I8d5297f850aeada5c5b14cfb7a206ce07493e116
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:55 -05:00
Anas Nashif 2318f02a7a watchdog: rework watchdog timer driver and use sys_io function
Simplify driver by using sys_io functions and implement

 wdt_read_config

Change-Id: I119615f1c391daae43a3b8db30319c51167ae05b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:55 -05:00
Andrew Boie bba9510319 irq_offload: API to run a function in IRQ context
Software interrupts or system calls aren't really appropriate for
zephyr, but we have an ongoing need in our test code to run a
function with arguments synchronously in interrupt context.

This patch introduces irq_offload() which allows us to do this without
separate initialization or having to manage fake IRQs in the
interrupt controller.

ARM assembly code contributed by Benjamin Walsh
<benjamin.walsh@windriver.com>

ARC is not yet implemented but will be in a subsequent patch.

irq_test_common.h has been removed and all test cases updated to
use the new API.

Change-Id: I9af99ed31b62bc7eb340e32cf65e3d11354d1ec7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:55 -05:00
Anas Nashif 5115fb57ad quark_se: rename platform and remove x86 suffix
Change-Id: I19ac3a4c6081720736c6fbf16b649ccf6ae60e2f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:54 -05:00
Dmitriy Korovkin 57f2741e4f init: Implement fine-grained initialization policy
Put initialization priorities as device driver Kconfig
parameter.

Initialization priority value for each platform is defined
in the platform Kconfig file.

Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.

Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:54 -05:00
Anas Nashif 1e3dca51bb build: set platform name without quotes and reuse everywhere
Avoid having to remove quotes wherever the platform name is used
by exporting the variable only once.

Change-Id: I4cb51901e4ac19d70d0310fe6bbacd157f586661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:54 -05:00
Benjamin Walsh ba31ab92a3 x86: refactor assembly flags in Makefiles
Add comment regarding the use of GAS when using clang, and remove
duplication of setting -Wa,--divide, which is needed for all toolchains.

Change-Id: Iab7257b038d1f4142c37a6c6c5979ef28f78a655
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Benjamin Walsh 4c57acb883 x86: split ABI related files
Move the files that *know* about the calling convention in use by the
compiler. The routines exposed by the files moved to the i386_sysV_abi
directory follow the C calling convention specified by the
i386_sysV_abi which is the default for GCC. The upstream GCC has been
enhanced to support the iamcu_ABI that is optimized for processors
that implement the IA MCU instruction set. This new ABI provides code,
data and stack size improvements on IA MCU based systems.

This change is the first step in adding support for the IA MCU
optimized toolchains to Zephyr OS

Change-Id: I13bffee8007fb3f82aa31389b2c241065e8e315d
Original-work-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Anas Nashif c47769bd56 kconfig: move all defconfig fragments to configs/
When building for a certain platform, we have no idea
what architecture we are building for.

We used to specify the architecture alongside the board or platform
name and this was used to find the defconfig in arch/<arch>/configs.

By putting all board configurations we support in one place we do
not have to specify the architecture, just the configuration name.

Change-Id: Ib7e9f63b9a8051714dc207f583fd26ef620497d8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:53 -05:00
Anas Nashif df73d32147 build: use architecture definition from kconfig
Do not depend on host architecture and use architecture definition
from the defconfig file of the board.

Change-Id: Idb3dd42524f26bd167a34d6eb024d4d9816e9730
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:52 -05:00
Anas Nashif 77ba3c3b8b kconfig: define architecture as a kconfig variable
Do not depend on environment variables and use a kconfig variable
for defining the architecture.

In addition, remove the X86_32 variable, it just duplicates X86 for
not good reason, at least until start supporting MCUs with 64bit.

Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:52 -05:00
Anas Nashif cd158f3750 x86: only build configured platform
Do not reference every platform, instead use the platform
name to tell make what to build.

Change-Id: I7498da7cdcdada754466222902f59fe4c6487d89
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:52 -05:00
Anas Nashif a4266c3baf kconfig: use wildcards for platforms
Move platform related data and definition to the platform
directory and include it using:

arch/<arch>/platforms/*/Kconfig.platform

This way we will able to add a platform as a directory of
content without the need to change and Kconfig files.
Platforms can then be included by reference (using repo or
git submodules and does not need to be part of the zephyr
project)

Change-Id: I5e71f5394c22edb346f7d61d9448b8e1c68e1f9b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:52 -05:00
Tomasz Bursztyka 39621510e2 Kconfig: quark_se-x86: Set proper default config settings
Provide the proper irq for i2c, gpio and spi. And make relevant drivers
getting enabled easily once their domain is selected.

Change-Id: Ib8a428e11b6163a1b370b23baa34ea2fab733565
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:52 -05:00
Tomasz Bursztyka 49ea925727 quark_se-x86: Provide the i2c IRQ flags
Without that, it won't built when enabling support for dw i2c in
quark_se-x86.

Change-Id: Icce26488d870c273516dc9f34555176122bcb9c8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:52 -05:00
Tomasz Bursztyka 14267b85c9 spi: dw: Fix various building and support issues
- Build the actual driver when relevant
- Provide the IOAPIC stub
- Provide the IRQ flags for IRQ_CONNECT_STATIC
- Set the default IRQ priorities

Change-Id: Iea20ef67c92cf7f48791fba5a8021448b7059950
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:52 -05:00
Szymon Janc c0baad2262 Rename simple UART driver to pipe UART
Original name was too generic and confusing. This patch renames
driver to pipe UART and moves it to console drivers folder. Kconfig
destription is also improved.

Change-Id: I716fdbf7d636bbdc03b0fce27a59fd866f473246
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
2016-02-05 20:24:52 -05:00
Anas Nashif 42d94e5dbe x86: Add Quark D2000 platform with nanokernel support
The Intel Quark microcontroller D2000, is a low power, battery-operated,
32-bit microcontroller.  Within its small footprint, the Intel Quark
microcontroller D2000 includes an Intel Quark ultra-low-power core
running at 32 MHz, with 32k integrated flash and 8k OTP SRAM.

Change-Id: I6ba121996edb0b5fbe596bd6ef3d6e3979ff73e9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:49 -05:00
Anas Nashif 00c4d32d42 x86: add Quark D2000 Interrupt Controller (MVIC)
This module is based on the standard Local APIC and IO APIC source modules.

This modules combines these modules into one source module that exports the
same APIs defined by the Local APIC and IO APIC header modules. These
routine have been adapted for the Quark D2000 Interrupt Controller which has
a cutdown implementation of the Local APIC & IO APIC register sets.

Change-Id: Ic80aa78918483663d76054ebadefa08d8a3f188a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:48 -05:00
Anas Nashif 226404c4bf x86: go back to integers for ram/rom size
This cause problems with some configurations using hex.

Change-Id: I680c40d46e1fdf3da714f6412c8dda0e1ebb44f9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:48 -05:00
Anas Nashif 4a4de7069e x86: add support for the Quark SE platform
Intel Quark SE Microcontroller with an onboard sensor subsystem.

Processor
* Intel Quark SE Processor Core
* Intel Pentium® Processor-based x86 ISA compatible CPU
* 32MHz clock, 32-bit address bus
* 8kB 2-way L1 instruction cache
Memory
* 384kB of on-die NVM +8kB OTP on-die NVM
* 80kB of on-die SRAM

Change-Id: I849ec5c1f1639e10a48c9ebab7d3653b88b23eb7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:48 -05:00
Anas Nashif 98beac134e add physical RAM address variable
Keep things consistent across all platforms and make this
configurable and avoid hardcoding in linker.cmd file.

Change-Id: Iddeb5107854139249fda70378e07b83066d8a7a1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:48 -05:00
Daniel Leung d3d64ca4cf bluetooth/uart: register driver at boot if enabled
The driver should handle the initialization instead of relying on
platform initialization. This is to conform to the driver model.

Change-Id: Idc95d59bce2470b5118e416ee05f07548991a15c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:48 -05:00
Dmitriy Korovkin 470ce8482c Initialize UART irq number statically
When PCI bus is not enumerated, I/O memory and IRQ
numbers need to be statically initialized.

Change-Id: I4efcccd95d8048910f6c900c8daf46cbe3a5fa00
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:48 -05:00
Andrew Boie f6dd6d5fd8 x86: atomic: don't use '__asm__ goto'
Not supported in LLVM/clang.  As it turns out,
this new implementation is 4 bytes shorter than its
predecessor.

Change-Id: I1f63b7a245dafcfc5a6dadc293875f00d02b997c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:47 -05:00
Anas Nashif db26a98c93 Fixed various clang build issues
Fix a few spots where building with with clang fails.

Change-Id: I621c7cb8daf119bf89ad512168d70e1c9b67e53f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:47 -05:00
Anas Nashif 1b702154b5 kbuild: add clang support
Clang support already existed in the Makefiles but was not complete
and some gcc options did not work with clang. Move those to be conditional
on the compiler used to make clang work.

To build with clang for x86:

make  CC=clang  -C samples/microkernel/apps/hello_world/

You still need the gcc cross environment for various tools.

For now, only x86 was tested.

Change-Id: Ic5aeab4f80d312e1d1312a4a9fc885a43f760270
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:47 -05:00
Dmitriy Korovkin f1420515a7 irq: Add flags to IRQ_CONNECT_STATIC() macro and irq_connect() function
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.

The change in API means that device drivers and sample
applications need to use the new API.

IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()

Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:44 -05:00
Tomasz Bursztyka 74e29ac373 galileo: Use SCH GPIO driver for it's legacy bridge GPIO controller
Such controller offers 2 blocks (respectivelly Core Well and Resume
Well) on Quark x1000, with 2 and 6 GPIO pins to use.

Change-Id: I50075f0880bef4574e9eeb1c65602082e8da647a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:44 -05:00
Anas Nashif 6ba5c09d23 kconfig: change RAM_SIZE to be in hex
We already had this kconfig defined as hex for arc. Make it
readable and change the variable to hex to comply with what
we had already.

Change-Id: Ib8bc72f27d1b97ba2c886201ec29fb13aa4fa429
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:43 -05:00
Andrew Boie c065ed5d78 x86: reduce footprint of exception debugging
We're smart, we can look up the vector IDs in a book if we
don't already know what they are.

Change-Id: Iaff3986d7c96dea597be4b2a5b13721ab57980fa
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh 665dd5d331 galileo: disable SPI_PORT_1 by default
Unused, uses IRQ17, which conflicts with UART1.

Change-Id: I5d285ee8a2e7e5d45b38a85a417bd36f0e4bb92e
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Dmitriy Korovkin ea5ff12110 galileo: Add ADC configuration
Change-Id: I694d2812496220e54e757cb89ce0c529f3bad48f
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis c7a76a226d galileo: Fix SPI speed and configuration values
Change-Id: If15b2931e00d3a5748a56cea673e694389a7e963
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis c5b10c6006 x86: Display registers on fatal error
Change-Id: Idb05fbb707f2c95173423c928acda2a07e962989
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis 6338c4518c x86: Update NANO_ESF and NANO_ISF structures
As the system always operates in ring 0, neither the SS nor ESP registers
are pushed onto the stack when an exception or an interrupt occurs.
However, as the ESP field is still relevant to debugging fatal errors, a
place has been carved for it in the NANO_ESF.

Change-Id: Ibb2578c69fa6365fd6e9dbf7b51f461063dadc68
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis e7018455d8 x86: Remove cr2 field from NANO_ESF structure
As page fault exceptions can not occur in the system as it is currently
designed, there is no need to track the CR2 register as part of the
exception stack frame.

Change-Id: I75d7a74c5d2c6efcc0e9141d2662861bc2052629
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh b0edae6047 x86/qemu: do not use -no-reboot flag when REBOOT=y
The -no-reboot flag causes QEMU to exit when trying to reboot through
the RST_CNT register.

Change-Id: I01262753587d2fc4e787262a8368ddba39fdeaa1
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00