Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The OpenISA RV32M1 pinctrl groups need a dummy pinctrl node to populate
with pinctrl options at the board level.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add OpenISA RV32M1 pinctrl header file to define SoC specific pinctrl_soc_t
structure. This is used to store pin configurations for the pinctrl driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This adds lazy floating point context switching. On svc/irq entrance,
the VFP is disabled and a pointer to the exception stack frame is saved
away. If the esf pointer is still valid on exception exit, then no
other context used the VFP so the context is still valid and nothing
needs to be restored. If the esf pointer is NULL on exception exit,
then some other context used the VFP and the floating point context is
restored from the esf.
The undefined instruction handler is responsible for saving away the
floating point context if needed. If the handler is in the first
irq/svc context and the current thread uses the VFP, then the float
context needs to be saved. Also, if the handler is in a nested context
and the previous context was using the FVP, save the float context.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit updates the Cortex-R reset routine to initialise
(synchronise) the VFP D16-D31 registers when Dual-redundant Core
Lock-step (DCLS) is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Grouping the FPU registers together will make adding FPU support for
Cortex-A/R easier later. It provides the ability to get the sizeof and
offsetof FPU registers easier.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Cortex-A/R use a descending stack frame and the hardware does not help
with the stacking. This led to some less than desirable workarounds in
the exception code where the basic stack frame was saved twice.
Rearranging the order of the exception stack frame removes that problem
and provides a clearer path to saving CPU context in a fully descending
manner.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
When Dual-redundant Core Lock-step (DCLS) topology is used, the VFP
registers across the two redundant cores must be manually initialised
and synchronised, and this requires the `-mfloat-abi=hard` option to
be specified.
This commit forces the use of FP "hard" ABI on the VFP-equipped cores
that are configured in DCLS topology.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Zephyr build system to support specifying
advanced floating-point compilation options derived from the newly
introduced unified floating-point configurations.
The following changes are introduced by this commit:
1. Specify architecture floating-point option to the `-mcpu` flag.
2. Specify floating-point unit (FPU) type using the `-mfpu` flag.
Note that the `-march` flag is not specified separately because the
`-mcpu` flag provides more detailed architecture options and this
makes the `-march` flag redundant.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the unified floating-point configuration symbols for
the ARM architectures.
These configuration symbols allow specification of the floating-point
coprocessors, such as VFP (also known as FP for Cortex-M) and NEON,
for the ARM architectures.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
For testing, assume that the Cortex-A/R platforms are using a GIC
interrupt controller. Use the last GIC SGI to trigger an interrupt for
the test.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit adds the `mps3_an547` board, a Cortex-M55 platform, as an
integration platform for all CMSIS-DSP FPU test cases so that the
M-Profile Vector Extension (MVE) vector function implementations are
tested in the CI.
With this change the FPU-enabled test coverage is as follows:
* mps2_an521_remote (Cortex-M33) tests FPU/DSP-enabled scalar function
implementations.
* mps3_an547 (Cortex-M55) tests FPU/DSP-enabled MVE vector function
implementations.
This also has a side effect of comprehensively exercising the M-Profile
Vector Extension support in the ARM architecture port, thereby ensuring
the arch-level FPU/DSP/MVE support is not broken.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This reverts commit 96c7f6ab75.
Zephyr SDK 0.14.1 now includes QEMU 6.2, which supports the emulation
of the MVE instructions.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This reverts commit 91d4b7766c.
Zephyr SDK 0.14.1 now includes QEMU 6.2, which supports the emulation
of the MVE instructions.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds support for testing the vector implementation of the
FIR filter functions when the MVE is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds support for testing the vector implementation of the
Biquad filter functions when the MVE is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The MVE vector version of the statistics functions are slightly less
accurate than the scalar equivalents, so allow a higher relative error
threshold when the MVE is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The MVE vector version of the `vinverse` function is slightly less
accurate than the scalar version, so allow a higher relative error
threshold when the MVE is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the missing common tables dependency for the SVM
functions.
The `exp_tab` and `exp_tab_f16` tables are required by the SVM
functions when the MVE is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The commit 94428044e2, which introduced
this behavioural change, forgot to update the instructions provided in
the comments.
This commit updates the obsolete instructions for using an alternate
emulation platform in the comments.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
nSIM SMP simulation is s bit slower than single-core one, so
let's increase timeouts for nSIM SMP platforms.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Twister allows us to control maximum execution time for each
test with timeout value in test .yaml configuration. This
helps us to prevent slow tests from stopping by timeout.
However it's hard to choose test timeout for all platforms
as some platforms are naturally slow. It could be a HW board with
power-efficient but slow CPU or simulation platform which
can perform instruction accurate simulation but does it slowly.
As we don't want to increase test timeout infinitely to meet
the needs of the slowest platform let's introduce
platform-specific test timeout management. It's implemented as
an optional 'timeout_multiplier' field in board .yaml
configuration. Setting it to some value multiplies each test
timeout by this value. By that we can increase timeouts only
for the platforms where it's required.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The `CMSIS_NN` Kconfig previously depended on the `CMSIS_DSP` Kconfig,
and this placed the "CMSIS-NN Library Support" prompt under the "CMSIS-
DSP Library Support" menu (note that CMSIS-DSP is a menuconfig).
Since the CMSIS-NN library, although it requires the CMSIS-DSP library,
is not a subordinate component of the CMSIS-DSP library, remove its
dependency on `CMSIS_DSP` and make it select the Kconfig symbol
instead.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Extend package copying functionality by adding function for converting
a package. Function gets callback+context pair and converted package
is part by part passed to that callback. Contrary to typical sprintf
callback which works on chars, callback works with buffers.
Existing cbprintf_package_copy function is implemented as static
inline and uses new cbprintf_package_convert API.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This updates the documentation of bt_gatt_is_subscribed function that
can take a bitfield of BT_GATT_CCC_NOTIFY and BT_GATT_CCC_INDICATE.
This might be useful if one wants to test if peer is subscribed, but
does not matter which method was used.
The gatt.c implementation handles API usage already, because it performs
bitwise AND:
if (bt_conn_is_peer_addr_le(conn, cfg->id, &cfg->peer) &&
(ccc_value & ccc->cfg[i].value)) {
return true;
}
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.
The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
When building with CONFIG_SCHED_CPU_MASK_PIN_ONLY we can assume that a
thread will always be executed in a same CPU and consequently skip the
cache invalidation.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Do not allow changing the CPU which a thread is pinned when it is
already being executed. This allows further optimizations in some
platforms with incoherent memory since we can safely assume that the
thread will run in the same CPU and avoid invalidate / flush the
cache during context switches.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The k_timer utility was written to assume that the kernel timeout
handler would never be delayed by more than a tick, so it can naively
reschedule the next interrupt with a simple delay.
Unfortunately real platforms have glitchy hardware and high tick
rates, and on intel_adsp we're seeing this promise being broken in
some circumstances.
It's probably not a good idea to try to plumb the timer driver
interface up into the IPC layer to do this correction, but thankfully
the existing absolute timeout API provides the tools we need (though
it does require that CONFIG_TIMEOUT_64BIT be enabled).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
LwM2M engine is blocking new notification send.
Notification or Send timeout trig Reconnect and registration state.
Send/Notification message is blocked if client is not connected.
Signed-off-by: Juha Heiskanen <juha.heiskanen@nordicsemi.no>
Do not query SIM card parameters if the SIM
card is not present.
This shortens the driver initialization time
significantly if a SIM card is not present.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In case a connection is encrypted received PDU is decrypted by CCM.
CCM does not encrypt/decrypt S1 byte that stores CTEInfo.
In case of reception of a PDU by encrypted connection there is missing
CTEInfo in a memory where CCM stores decrypted PDU.
The CTEInfo data must be copied from scratch packet.
The commit adds code responsible for copying of the CTEInfo into
target PDU memory.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
When bootstrap is used, the server object shouldn't be autocreated.
Automatically creating object may cause problems after bootstrap
has been done and bootstrap server deletes and creates instances
for server object. In the next boot the auto-created server object
may have clashing server_id with the server object that the
bootstrap-server has created.
Also lifetime wasn't properly added to the registration message from
the server object.
Signed-off-by: Jarno Lamsa <jarno.lamsa@nordicsemi.no>
Added return code for for lwm2m_rd_client_start() & lwm2m_rd_client_stop().
lwm2m_rd_client_start() return -EINPROGRESS when start is in progress and
0 for success.
lwm2m_rd_client_stop() return -EPERM when context is unknown and
0 for success.
Signed-off-by: Juha Heiskanen <juha.heiskanen@nordicsemi.no>
There are boards without CMOS RTC, where blind accesses to
the RTC registers will freeze the system. So make the test
works with these boards if CONFIG_COUNTER_CMOS=n.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Henrik Brix Andersen