SAADC peripheral for nRF54L Series allows to choose internal
voltages as positive inputs.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Split header files containing symbols denoting SAADC inputs
so that only supported inputs can be used for given device.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
The Drivers using Pinctrl should be turning Pinctrl on
this should not be the responsibility of the board. This
commit removes CONFIG_PINCTRL from the boards side for nxp boards.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
STM32F1 doesn't have synchronous/asynchronous source clock choice.
The recently added clock check was failing compilation for these series.
This commit removes the check for F1.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a compile-time check to verify that a domain clock is explicitly
defined if a STM32 ADC is configured to use an asynchronous clock.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The `default y`, which is coupled with
depends on DT_HAS_TI_ADS1112_ENABLED to link the settings with DeviceTree,
which was missing, so I added it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add Data Memory Barrier during the extended calibration of STM32U5, as it
is done in STM32Cube HAL, to avoid sporadic errors during calibration that
may result in measures that are offset from real values.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Only ADC_REF_INTERNAL reference option is allowed in
adc_mcux_adc16 driver, but the reference is not used
for driver configuration. Internal, external or VDD
can be used in reality depending on SoC type and
its configuration.
Remove the reference option check to allow any reference
option from Devicetree.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Register all the lpi2c instances.
Add no-power-level property and update driver
to adapt no-power-level property.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Commit 47187a9ec9 made the `pinctrl` property
of STM32 ADCs optional, to allow usage of internal channels without wasting
GPIO pins. However, the driver was not adapted to support this new usecase.
(The real bug comes from commit 93956b2073,
that transitioned from a custom `stm32_dt_pinctrl_configure` function to
the standard `pinctrl_apply_state`, without accounting for the fact that
the former returns 0 when pinctrl is empty, but the latter returns -ENOENT)
Modify the driver to work even if no `pinctrl` is present on the ADC node.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Remove all entries that as not being used.
This also update hal to re-enable warning flags
as such as -Wno-unused-variable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Select PINCTRL subsystem by drivers which require it.
Prevent the need from enabling this symbol at board or soc level.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Extend the adc_mcux_adc12 adc api to set the ref_internal to
a value of vref-mv property.
Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
Enable support for channels >= 16 on devices S32K146 and S32K148.
Channels >= 16 are encoded as 100000b..101111b in SC1[ADCH] field.
Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
Update Ambiq adc driver to add apollo4
fixed typ of BUMBER to NUMBER
Move buffer size prio to configuring slots
and enabling the ADC
removed #if defined(CONFIG_PM_DEVICE_RUNTIME)
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
The STM32H5x adc has a special option register that
needs to be set when using channel 0 on adc1.
fixes: #77618
Signed-off-by: Lars Jeppesen <lje@foss.dk>
Some hardware configuration require rely on the ALERT/RDY
pin to know when and ADC conversion is completed.
The polling thread is left as fallback, when the pin
is not defined.
Signed-off-by: Efrain Calderon <efrain.calderon.estrada@gmail.com>
The "channels-num" should not be used here, other system's parts are using
"channel-count" instead for the same purpose.
Also property's description has been сorrected.
Signed-off-by: Andrey VOLKOV <andrey.volkov@munic.io>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The .ref_internal field in the adc_driver_api
struct was previously unset.
Now it's set to the proper value, 1 V.
Signed-off-by: Julia Azziz <juliaazziz7@gmail.com>
ESP32S3 requires ESP_ADC_CAL_VAL_EFUSE_TP_FIT calibration
scheme. The use of ESP_ADC_CAL_VAL_EFUSE_TP is not supported
in the SoC..
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The NRF SAADC produces negative values in single ended mode if the
positive input is below 0V (ground). This behavior does not match
the ADC device driver API, which states that in single ended mode,
the readings must be positive [0 .. 2^resolution - 1].
This commit extends the adc_nrfx_saadc device driver to track which
channels in a sequence are configured to be single ended, to then
corrects negative readings for these channels to 0.
This patch only works if the ADC resolution is lower than the sample
bit size. This is the case for 8, 10, 12 and 14 bit resolutions for
the nRF 52, 53 and 91 series which store readings in a int16_t.
The nRF 54H and 54L series store 8-bit resolution readings in a 8-bit
sample size. A check has been added to start_read() to prevent single
ended mode readings if the resolution is 8-bit for these platforms.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Updated nxp lpadc driver, because the phandle type property
'nxp,reference-supply' was removed, and a new phandle-array
type property 'nxp,references' added.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
During channel reads, zero is returned on CRC mismatches: the returned
error variable is not written to after a previous non-zero check. Return
-EIO to mirror other drivers' checksum validation behaviors.
Signed-off-by: Jared Kangas <kangas.jd@gmail.com>
For STM32H7, U5 and WBA, check the LDORDY bit of the ADC ISR register
after enabling the internal regulator. This method is safer than the
delay.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Burst mode enabled on an unused channel causes a freeze during a
conversion consisting of several channels (not including the one with
burst mode enabled).
Discovered on nRF52832 (nRF52-DK) using the following approach:
channels 0-3 are used for application purposes as a sequence
channel 4 is used for battery measurements with oversampling
After few successful conversions the sequence (channels 0-3) freezes the
thread while waiting for semaphore to end the conversion.
Signed-off-by: Maksim Salau <maksim.salau@gmail.com>
Removed PM device runtime support from drivers in PD_SYS domain.
Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Introduce the stm32h7RS serie to the ADC driver,
based on the stm32h7: two ADC 12 resolution
For stm32h7rs ADC calibration, the
LL_ADC_SetCalibrationFactor is not used.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Nikodem Kastelik